Lines Matching full:trace

23 :Trace Registers: {CONFIGR + others}
25     Bit select trace features. See ‘mode’ section below. Bits
26     in this will cause equivalent programming of trace config and
32     bitfield up to 32 bits setting trace features.
40 :Trace Registers: All
42     Reset all programming to trace nothing / no logic programmed.
50 :Trace Registers: PRGCTLR, All hardware regs.
53       and enables trace.
55     - = 0 : disable trace hardware.
63 :Trace Registers: None.
75 :Trace Registers: None.
88 :Trace Registers: ACVR[idx, idx+1], VIIECTLR
111 :Trace Registers: ACVR[idx]
124 :Trace Registers: ACVR[idx], VISSCTLR
126     Set a trace start address comparator according to addr_idx.
136 :Trace Registers: ACVR[idx], VISSCTLR
138     Set a trace stop address comparator according to addr_idx.
148 :Trace Registers: ACATR[idx,{6:4}]
162 :Trace Registers: ACATR[idx,{3:2}]
177 :Trace Registers: ACATR[idx,{14:8}]
194 :Trace Registers: ACATR[idx,{1:0}]
204 :Trace Registers: ACVR[idx, idx+1], ACATR[idx], VIIECTLR
220 :Trace Registers: From IDR4
227 :Trace Registers: None
234 :Trace Registers: SSCCR[idx]
247 :Trace Registers: SSCSR[idx]
264 :Trace Registers: SSPCICR[idx]
277 :Trace Registers: VICTLR{23:20}
280     exception filter bits. Setting ‘1’ excludes trace from the
290     Excludes EL2 NS trace.
295 :Trace Registers: VIPCSSCTLR
302 :Trace Registers: BBCTLR
312 :Trace Registers: CCCTLR
323 :Trace Registers: SYNCPR
325     Set trace synchronisation period. Power of 2 value, 0 (off)
331 :Trace Registers: none
343 :Trace Registers: CNTCTLR[idx]
356 :Trace Registers: CNTRLDVR[idx]
369 :Trace Registers: From IDR5
377 :Trace Registers: None
389 :Trace Registers: CIDCVR[idx]
398 :Trace Registers: CIDCCTLR0, CIDCCTLR1, CIDCVR<0-7>
416 :Trace Registers: From IDR4
423 :Trace Registers: None
435 :Trace Registers: VMIDCVR[idx]
444 :Trace Registers: VMIDCCTLR0, VMIDCCTLR1, VMIDCVR<0-7>
459 :Trace Registers: From IDR4
466 :Trace Registers: None.
479 :Trace Registers: RSCTLR[idx]
492 :Trace Registers: From IDR4
499 :Trace Registers: EVENTCTRL0R
513 :Trace Registers: EVENTCTRL1R
515     Choose events which insert event packets into trace stream.
526 :Trace Registers: TSCTLR
539 :Trace Registers: None
546 :Trace Registers: SEQSTR
553 :Trace Registers: SEQEVR[idx]
569 :Trace Registers: SEQRSTEVR
581 :Trace Registers: From IDR5
588 :Trace Registers: From IDR4
595 :Trace Registers: From IDR5
602 :Trace Registers: From IDR4
634 This is a bitfield selection parameter that sets the overall trace mode for the
665     Set to enable cycle accurate trace if supported [IDR0].
692     Set to enable trace return stack use if supported [IDR0].
771     Set default trace setup to exclude kernel mode trace (see note a)
778     Set default trace setup to exclude user space trace (see note a)
782 *Note a)* On startup the ETM is programmed to trace the complete address space
793 data trace. As A-profile data trace is architecturally prohibited in ETMv4,