device_drivers/wan/z8530book.rst

10 The Z85x30 family synchronous/asynchronous controller chips are used on
11 a large number of cheap network interface cards. The kernel provides a
13 services using this chip.
25 on the chip (each chip has two channels).
28 chip is interface to the I/O and interrupt facilities of the host
34 The DMA mode supports the chip when it is configured to use dual DMA
35 channels on an ISA bus. The better cards tend to support this mode of
38 noting here that many PC machines hang or crash when the chip is driven
54 Having identified the chip you need to fill in a struct z8530_dev,
55 which describes each chip. This object must exist until you finally
58 interrupt number of the chip. (Each chip has a single interrupt source
68 delay for chip settling done in software. The PORT_SLEEP option is
69 architecture specific. Other flags may become available on future
71 start the chip up as disabled and discarding interrupt events. This
76 sense to make it match the network name.
78 Repeat the same operation with the B channel if your chip has both
90 :c:func:`z8530_init()`. This will probe the chip and reset it into
92 chip type. If the checks fail to pass the function returns a non zero
95 initialised to either Z8530, Z85C30 or Z85230 according to the chip
103 Attaching Network Interfaces
106 If you wish to use the network interface facilities of the driver, then
107 you need to attach a network device to each channel that is present and
112 The network device used for each channel should be pointed to by the
113 netdevice field of each channel. The hdlc-> priv field of the network
114 device points to your private data - you will need to be able to find
119 private field of the network device. The network device fields of the
120 channels then point back to the network devices.
125 Before you register your network device you will also need to provide
126 suitable handlers for most of the network device callbacks. See the
127 network device documentation for more details on this.
133 registers on the Z8530 chips. When programming the register settings for
139 Z8530 register number. Add 16 to indicate the alternate register bank on
145 is the same configuration using the enhancements of the 85230 chip. The
151 sure to set registers 1-7, 9-11, 14 and 15 in all configurations. Where
152 the register settings depend on DMA selection the driver will update the
158 This places high demands on the host processor to avoid latency. The
166 context and passes you the channel and a network buffer (struct
174 This expects to be passed the network device and the channel. Typically
175 this is called from your network device open callback. On a failure a
185 :c:func:`z8530_sync_dma_open()` function. On failure a non zero
191 side. As the Z85C30 has a larger FIFO on the receive channel this tends
193 ``z8530_sync_txdma_open``. This returns a non zero error code on failure. The
197 Network Layer Functions
205 The function :c:func:`z8530_queue_xmit()` takes a network buffer
215 of the interface code needed to implement the network layer get_stats
249 .. kernel-doc:: drivers/net/wan/z85230.c
255 .. kernel-doc:: drivers/net/wan/z85230.c