Documentation/gpu/komeda-kms.rst

4  drm/komeda Arm display driver
7 The drm/komeda driver supports the Arm display processor D71 and later products,
11 Overview of D71 like display IPs
14 From D71, Arm display IP begins to adopt a flexible and modularized
15 architecture. A display pipeline is made up of multiple individual and
34 for layer scaling, or connected to compositor and scale the whole display
40 Compositor blends multiple layers or pixel data flows into one single display
44 the display frame first and then write to memory.
58 Final stage of display pipeline, Timing controller is not for the pixel
59 handling, but only for controlling the display timing.
83 -   Dual display mode
84     Two pipelines work independently and separately to drive two display outputs.
86 -   Single display mode
87     Two pipelines work together to drive only one display output.
215 A complete display pipeline can be easily divided into three sub-pipelines
282 Display output pipeline
285    :alt: display digraph
286    :caption: display output data flow
315 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
339 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_dev.h
345 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
347 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
365 -   Crtc: `Display output pipeline`_
468 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_kms.h
473 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_crtc.c
475 .. kernel-doc:: drivers/gpu/drm/arm/display/komeda/komeda_plane.c
483 -   komeda_dev: describes the real display hardware.