Lines Matching +full:spi +full:- +full:device

1 Marvell Orion SPI device
4 - compatible : should be on of the following:
5 - "marvell,orion-spi" for the Orion, mv78x00, Kirkwood and Dove SoCs
6 - "marvell,armada-370-spi", for the Armada 370 SoCs
7 - "marvell,armada-375-spi", for the Armada 375 SoCs
8 - "marvell,armada-380-spi", for the Armada 38x SoCs
9 - "marvell,armada-390-spi", for the Armada 39x SoCs
10 - "marvell,armada-xp-spi", for the Armada XP SoCs
11 - reg : offset and length of the register set for the device.
13 the SPI direct access mode that some of the Marvell SoCs support
19 chip-select lines 0 through 7 respectively.
20 - cell-index : Which of multiple SPI controllers is this.
21 - clocks : pointers to the reference clocks for this device, the first
22 one is the one used for the clock on the spi bus, the
27 - interrupts : Is currently not used.
28 - clock-names : names of used clocks, mandatory if the second clock is
34 spi@10600 {
35 compatible = "marvell,orion-spi";
36 #address-cells = <1>;
37 #size-cells = <0>;
38 cell-index = <0>;
43 Example with SPI direct mode support (optionally):
44 spi0: spi@10600 {
45 compatible = "marvell,orion-spi";
46 #address-cells = <1>;
47 #size-cells = <0>;
48 cell-index = <0>;
62 'soc' node needs to add the entries for the desired SPI controllers
63 and its chip-selects that are used in the direct mode instead of PIO
64 mode. Here an example for this (SPI controller 0, device 1 and SPI
65 controller 1, device 2 are used in direct mode. All other SPI device
69 * Enable the SPI direct access by configuring an entry
70 * here in the board-specific ranges property
74 <MBUS_ID(0x01, 0x5e) 0 0 0xf1100000 0x10000>, /* SPI0-DEV1 */
75 <MBUS_ID(0x01, 0x9a) 0 0 0xf1110000 0x10000>; /* SPI1-DEV2 */
79 Documentation/devicetree/bindings/bus/mvebu-mbus.txt