bindings/spi/spi-controller.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Mark Brown <broonie@kernel.org>
15   controller may be described for use in SPI master mode or in SPI slave mode,
20     pattern: "^spi(@.*|-[0-9a-f])*$"
22   "#address-cells":
25   "#size-cells":
28   cs-gpios:
32       increased automatically with max(cs-gpios, hardware chip selects).
35       cs-gpios looks like this
36         cs-gpios = <&gpio1 0 0>, <0>, <&gpio1 1 0>, <&gpio1 2 0>;
45   num-cs:
50   spi-slave:
51     $ref: /schemas/types.yaml#/definitions/flag
56   - if:
59           - spi-slave
62         "#address-cells":
66         "#address-cells":
79       - compatible
81   "^.*@[0-9a-f]+$":
95       spi-3wire:
96         $ref: /schemas/types.yaml#/definitions/flag
98           The device requires 3-wire mode.
100       spi-cpha:
101         $ref: /schemas/types.yaml#/definitions/flag
103           The device requires shifted clock phase (CPHA) mode.
105       spi-cpol:
106         $ref: /schemas/types.yaml#/definitions/flag
108           The device requires inverse clock polarity (CPOL) mode.
110       spi-cs-high:
111         $ref: /schemas/types.yaml#/definitions/flag
115       spi-lsb-first:
116         $ref: /schemas/types.yaml#/definitions/flag
118           The device requires the LSB first mode.
120       spi-max-frequency:
125       spi-rx-bus-width:
132       spi-rx-delay-us:
136       spi-tx-bus-width:
143       spi-tx-delay-us:
148       - compatible
149       - reg
154   - |
156         #address-cells = <1>;
157         #size-cells = <0>;
158         compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
161         interrupt-parent = <&mpc5200_pic>;
163         ethernet-switch@0 {
165             spi-max-frequency = <1000000>;
171             spi-max-frequency = <100000>;