bindings/memory-controllers/nvidia%2Ctegra186-mc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) SoC Memory Controller
10   - Jon Hunter <jonathanh@nvidia.com>
11   - Thierry Reding <thierry.reding@gmail.com>
14   The NVIDIA Tegra186 SoC features a 128 bit memory controller that is split
16   handles memory requests for 40-bit virtual addresses from internal clients
17   and arbitrates among them to allocate memory bandwidth.
19   Up to 15 GiB of physical memory can be supported. Security features such as
27     pattern: "^memory-controller@[0-9a-f]+$"
31       - enum:
32           - nvidia,tegra186-mc
33           - nvidia,tegra194-mc
41   "#address-cells":
44   "#size-cells":
49   dma-ranges: true
52   "^external-memory-controller@[0-9a-f]+$":
54       The bulk of the work involved in controlling the external memory
55       controller on NVIDIA Tegra186 and later is performed on the BPMP. This
57       which the external memory is clocked and a remote procedure call that
63           - enum:
64               - nvidia,tegra186-emc
65               - nvidia,tegra194-emc
75           - description: external memory clock
77       clock-names:
79           - const: emc
87   - compatible
88   - reg
89   - interrupts
90   - "#address-cells"
91   - "#size-cells"
96   - |
97     #include <dt-bindings/clock/tegra186-clock.h>
98     #include <dt-bindings/interrupt-controller/arm-gic.h>
101         #address-cells = <2>;
102         #size-cells = <2>;
104         memory-controller@2c00000 {
105             compatible = "nvidia,tegra186-mc";
109             #address-cells = <2>;
110             #size-cells = <2>;
115              * Memory clients have access to all 40 bits that the memory
116              * controller can address.
118             dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
120             external-memory-controller@2c60000 {
121                 compatible = "nvidia,tegra186-emc";
125                 clock-names = "emc";
133         compatible = "nvidia,tegra186-bpmp";
134         #clock-cells = <1>;