bindings/mailbox/st%2Cstm32-ipcc.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10   The IPCC block provides a non blocking signaling mechanism to post and
16   - Fabien Dessenne <fabien.dessenne@st.com>
17   - Arnaud Pouliquen <arnaud.pouliquen@st.com>
21     const: st,stm32mp1-ipcc
31       - description: rx channel occupied
32       - description: tx channel free
33       - description: wakeup source
37   interrupt-names:
39       - const: rx
40       - const: tx
41       - const: wakeup
45   wakeup-source: true
47   "#mbox-cells":
50   st,proc-id:
56   - compatible
57   - reg
58   - st,proc-id
59   - clocks
60   - interrupt-names
61   - "#mbox-cells"
62   - interrupts
67   - |
68     #include <dt-bindings/interrupt-controller/arm-gic.h>
69     #include <dt-bindings/clock/stm32mp1-clks.h>
70     ipcc: mailbox@4c001000 {
71       compatible = "st,stm32mp1-ipcc";
72       #mbox-cells = <1>;
74       st,proc-id = <0>;
75       interrupts-extended = <&intc GIC_SPI 100 IRQ_TYPE_NONE>,
78       interrupt-names = "rx", "tx", "wakeup";
79       clocks = <&rcc_clk IPCC>;
80       wakeup-source;