bindings/interrupt-controller/ti%2Csci-inta.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Lokesh Vutla <lokeshvutla@ti.com>
13   - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
17   which handles the termination of system events to that they can
18   be coherently processed by the host(s) in the system. A maximum
22                        +-----------------------------------------+
24                        | +--------------+  +------------+        |
25               m ------>| | vint  | bit  |  | 0 |.....|63| vint0  |
26                  .     | +--------------+  +------------+        |      +------+
28   Globalevents  ------>|         .               .               |----->| IRQ  |
30                  .     |         .               .               |      +------+
31               n ------>| +--------------+  +------------+        |
33                        | +--------------+  +------------+        |
36                        | +--------------+                        |
37   Unmapped events ---->| |   umapidx    |-------------------------> Globalevents
38                        | +--------------+                        |
40                        +-----------------------------------------+
43   done by a system controller (like the Device Memory and Security Controller
44   on AM654 SoC). Driver should request the system controller to get the range
47   system controller to map specific global event to vint, bit pair.
49   Communication between the host processor running an OS and the system
50   controller happens through a protocol called TI System Control Interface
55     const: ti,sci-inta
60   interrupt-controller: true
62   msi-controller: true
64   ti,interrupt-ranges:
65     $ref: /schemas/types.yaml#/definitions/uint32-matrix
71         - description: |
73         - description: |
75         - description: |
78   ti,unmapped-event-sources:
79     $ref: /schemas/types.yaml#definitions/phandle-array
84   - compatible
85   - reg
86   - interrupt-controller
87   - msi-controller
88   - ti,sci
89   - ti,sci-dev-id
90   - ti,interrupt-ranges
95   - |
97         #address-cells = <2>;
98         #size-cells = <2>;
100         main_udmass_inta: msi-controller@33d00000 {
101             compatible = "ti,sci-inta";
103             interrupt-controller;
104             msi-controller;
105             interrupt-parent = <&main_navss_intr>;
107             ti,sci-dev-id = <179>;
108             ti,interrupt-ranges = <0 0 256>;