iio/frequency/adf4371.yaml

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Popa Stefan <stefan.popa@analog.com>
14   https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf
15   https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf
20       - adi,adf4371
21       - adi,adf4372
28       Definition of the external clock (see clock/clock-bindings.txt)
31   clock-names:
36   adi,mute-till-lock-en:
40       output stage will shut down until the ADF4371/ADF4372 achieves lock as
41       measured by the digital lock detect circuitry.
43   spi-max-frequency: true
46   - compatible
47   - reg
48   - clocks
49   - clock-names
54   - |
56         #address-cells = <1>;
57         #size-cells = <0>;
62                 spi-max-frequency = <1000000>;
64                 clock-names = "clkin";