bindings/gpio/snps%2Cdw-apb-gpio.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB GPIO controller
10   Synopsys DesignWare GPIO controllers have a configurable number of ports,
12   GPIO-controller properties as desribed in this bindings file.
15   - Hoan Tran <hoan@os.amperecomputing.com>
16   - Serge Semin <fancer.lancer@gmail.com>
20     pattern: "^gpio@[0-9a-f]+$"
23     const: snps,dw-apb-gpio
25   "#address-cells":
28   "#size-cells":
37       - description: APB interface clock source
38       - description: DW GPIO debounce reference clock source
40   clock-names:
43       - const: bus
44       - const: db
50   "^gpio-(port|controller)@[0-9a-f]+$":
54         const: snps,dw-apb-gpio-port
59       gpio-controller: true
61       '#gpio-cells':
69       snps,nr-gpios:
70         description: The number of GPIO pins exported by the port.
79           The interrupts to the parent controller raised when GPIOs generate
80           the interrupts. If the controller provides one combined interrupt
81           for all GPIOs, specify a single interrupt. If the controller provides
82           one interrupt for each GPIO, provide a list of interrupts that
83           correspond to each of the GPIO pins.
87       interrupt-controller: true
89       '#interrupt-cells':
93       - compatible
94       - reg
95       - gpio-controller
96       - '#gpio-cells'
99       interrupt-controller: [ interrupts ]
106   - compatible
107   - reg
108   - "#address-cells"
109   - "#size-cells"
112   - |
113     gpio: gpio@20000 {
114       compatible = "snps,dw-apb-gpio";
116       #address-cells = <1>;
117       #size-cells = <0>;
119       porta: gpio-port@0 {
120         compatible = "snps,dw-apb-gpio-port";
122         gpio-controller;
123         #gpio-cells = <2>;
124         snps,nr-gpios = <8>;
125         interrupt-controller;
126         #interrupt-cells = <2>;
127         interrupt-parent = <&vic1>;
131       portb: gpio-port@1 {
132         compatible = "snps,dw-apb-gpio-port";
134         gpio-controller;
135         #gpio-cells = <2>;
136         snps,nr-gpios = <8>;