Lines Matching +full:ddr +full:- +full:pmu
4 - compatible: Must be "rockchip,rk3399-dmc".
5 - devfreq-events: Node to get DDR loading, Refer to
7 rockchip-dfi.txt
8 - clocks: Phandles for clock specified in "clock-names" property
9 - clock-names : The name of clock used by the DFI, must be
11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp.txt
13 - center-supply: DMC supply node.
14 - status: Marks the node enabled/disabled.
17 - interrupts: The CPU interrupt number. The interrupt specifier
19 It should be a DCF interrupt. When DDR DVFS finishes
21 - rockchip,pmu: Phandle to the syscon managing the "PMU general register
24 Following properties relate to DDR timing:
26 - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/rk3399-ddr.h,
27 it selects the DDR3 cl-trp-trcd type. It must be
32 - rockchip,pd_idle : Configure the PD_IDLE value. Defines the
33 power-down idle period in which memories are
34 placed into power-down mode if bus is idle
37 - rockchip,sr_idle : Configure the SR_IDLE value. Defines the
38 self-refresh idle period in which memories are
39 placed into self-refresh mode if bus is idle
44 - rockchip,sr_mc_gate_idle : Defines the memory self-refresh and controller
46 into self-refresh mode and memory controller
50 - rockchip,srpd_lite_idle : Defines the self-refresh power down idle
52 self-refresh power down mode if bus is idle
56 - rockchip,standby_idle : Defines the standby idle period in which
57 memories are placed into self-refresh mode.
62 - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz.
63 When DDR frequency is less than DRAM_DLL_DISB_FREQ,
67 - rockchip,phy_dll_dis_freq : Defines the PHY dll bypass frequency in
68 MHz (Mega Hz). When DDR frequency is less than
72 - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines
74 when the DDR frequency is less then ddr3_odt_dis_freq,
78 - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines
82 - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines
86 - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines
91 - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines
95 - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines
99 - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines
101 When DDR frequency is less then ddr3_odt_dis_freq,
105 - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines
109 - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines
113 - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines
118 - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines
123 - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define
127 - rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter
129 MHz (Mega Hz). When the DDR frequency is less then
133 - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines
137 - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines
141 - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines
145 - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines
150 - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines
154 - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines
158 - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines
164 compatible = "operating-points-v2";
167 opp-hz = /bits/ 64 <300000000>;
168 opp-microvolt = <900000>;
171 opp-hz = /bits/ 64 <666000000>;
172 opp-microvolt = <900000>;
177 compatible = "rockchip,rk3399-dmc";
178 devfreq-events = <&dfi>;
181 clock-names = "dmc_clk";
182 operating-points-v2 = <&dmc_opp_table>;
183 center-supply = <&ppvar_centerlogic>;