bindings/clock/st%2Cstm32mp1-rcc.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Gabriel Fernandez <gabriel.fernandez@st.com>
13   The RCC IP is both a reset and a clock controller.
14   RCC makes also power management (resume/supend and wakeup interrupt).
18   Documentation/devicetree/bindings/clock/clock-bindings.txt
24   dt-bindings/clock/stm32mp1-clks.h header and can be used in device
33   The index is the bit number within the RCC registers bank, starting from RCC
38   For example on STM32MP1, for LTDC reset:
42   The list of valid indices for STM32MP1 is available in:
43   include/dt-bindings/reset-controller/stm32mp1-resets.h
49   "#clock-cells":
52   "#reset-cells":
57       - const: st,stm32mp1-rcc
58       - const: syscon
64   - "#clock-cells"
65   - "#reset-cells"
66   - compatible
67   - reg
72   - |
73     rcc: rcc@50000000 {
74         compatible = "st,stm32mp1-rcc", "syscon";
76         #clock-cells = <1>;
77         #reset-cells = <1>;