Lines Matching +full:hip01 +full:- +full:sysctrl

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
16 There are some variants of the Hisilicon system controller, such as HiP01,
19 offset. In addition, the HiP01 system controller has some specific control
20 registers for HIP01 SoC family, such as slave core boot.
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
33 const: hisilicon,hi6220-sysctrl
36 - '#clock-cells'
41 - items:
42 - enum:
43 - hisilicon,sysctrl
44 - hisilicon,hi6220-sysctrl
45 - hisilicon,hi3519-sysctrl
46 - const: syscon
47 - items:
48 - const: hisilicon,hip01-sysctrl
49 - const: hisilicon,sysctrl
54 smp-offset:
56 offset in sysctrl for notifying slave cpu booting
63 resume-offset:
64 description: offset in sysctrl for notifying cpu0 when resume
67 reboot-offset:
68 description: offset in sysctrl for system reboot
71 '#clock-cells':
74 '#reset-cells':
77 '#address-cells':
80 '#size-cells':
86 - compatible
87 - reg
93 - |
95 system-controller@802000 {
96 compatible = "hisilicon,sysctrl", "syscon";
97 #address-cells = <1>;
98 #size-cells = <1>;
102 smp-offset = <0x31c>;
103 resume-offset = <0x308>;
104 reboot-offset = <0x4>;
107 compatible = "hisilicon,hi3620-clock";
109 #clock-cells = <1>;
113 /* HiP01 system controller */
114 system-controller@10000000 {
115 compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
117 reboot-offset = <0x4>;
121 system-controller@f7030000 {
122 compatible = "hisilicon,hi6220-sysctrl", "syscon";
124 #clock-cells = <1>;
128 system-controller@12010000 {
129 compatible = "hisilicon,hi3519-sysctrl", "syscon";