Lines Matching +full:default +full:- +full:trigger
1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.
20 output hardware trigger signals. CTIs can have a maximum number of input and
21 output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The
31 In general the connections between CTI and components via the trigger signals
38 indicate this feature (arm,coresight-cti-v8-arch).
40 When CTI trigger connection information is unavailable then a minimal driver
41 binding can be declared with no explicit trigger signals. This will result
43 DEVID register and make them all available for use as a single default
48 configuration). These registers may be used to explore the trigger connections
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
57 optional array alongside the signal indexes. Omitting types will default all
60 Note that some hardware trigger signals can be connected to non-CoreSight
64 - Mike Leach <mike.leach@linaro.org>
67 - $ref: /schemas/arm/primecell.yaml#
75 - arm,coresight-cti
77 - compatible
81 pattern: "^cti(@[0-9a-f]+)$"
84 - items:
85 - const: arm,coresight-cti
86 - const: arm,primecell
87 - items:
88 - const: arm,coresight-cti-v8-arch
89 - const: arm,coresight-cti
90 - const: arm,primecell
99 base cti node if compatible string arm,coresight-cti-v8-arch is used,
100 or may appear in a trig-conns child node when appropriate.
102 arm,cti-ctm-id:
106 separate CTI/CTM nets. Typically multi-socket systems where the CTM is
109 arm,cs-dev-assoc:
114 will be enabled. Use in a trig-conns node, or in CTI base node when
115 compatible string arm,coresight-cti-v8-arch used. If the associated
121 # size cells and address cells required if trig-conns node present.
122 "#size-cells":
125 "#address-cells":
129 '^trig-conns@([0-9]+)$':
132 A trigger connections child node which describes the trigger signals
142 arm,trig-in-sigs:
143 $ref: /schemas/types.yaml#/definitions/uint32-array
147 List of CTI trigger in signal numbers in use by a trig-conns node.
149 arm,trig-in-types:
150 $ref: /schemas/types.yaml#/definitions/uint32-array
154 List of constants representing the types for the CTI trigger in
156 arm,trig-in-sigs array. If the -types array is smaller, or omitted
157 completely, then the types will default to GEN_IO.
159 arm,trig-out-sigs:
160 $ref: /schemas/types.yaml#/definitions/uint32-array
164 List of CTI trigger out signal numbers in use by a trig-conns node.
166 arm,trig-out-types:
167 $ref: /schemas/types.yaml#/definitions/uint32-array
171 List of constants representing the types for the CTI trigger out
173 in the arm,trig-out-sigs array. If the "-types" array is smaller,
174 or omitted completely, then the types will default to GEN_IO.
176 arm,trig-filters:
177 $ref: /schemas/types.yaml#/definitions/uint32-array
181 List of CTI trigger out signals that will be blocked from becoming
184 arm,trig-conn-name:
188 arm,cs-dev-assoc properties are not being used in this connection.
189 Principle use for CTI that are connected to non-CoreSight devices, or
193 - required:
194 - arm,trig-in-sigs
195 - required:
196 - arm,trig-out-sigs
198 - required:
199 - arm,trig-conn-name
200 - required:
201 - cpu
202 - required:
203 - arm,cs-dev-assoc
205 - reg
208 - compatible
209 - reg
210 - clocks
211 - clock-names
217 const: arm,coresight-cti-v8-arch
221 - cpu
227 - |
229 compatible = "arm,coresight-cti", "arm,primecell";
233 clock-names = "apb_pclk";
235 # v8 architecturally defined CTI - CPU + ETM connections generated by the
237 - |
239 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
244 clock-names = "apb_pclk";
247 arm,cs-dev-assoc = <&etm1>;
249 # Implementation defined CTI - CPU + ETM connections explicitly defined..
250 # Shows use of type constants from dt-bindings/arm/coresight-cti-dt.h
251 # #size-cells and #address-cells are required if trig-conns@ nodes present.
252 - |
253 #include <dt-bindings/arm/coresight-cti-dt.h>
256 compatible = "arm,coresight-cti", "arm,primecell";
260 clock-names = "apb_pclk";
262 arm,cti-ctm-id = <1>;
264 #address-cells = <1>;
265 #size-cells = <0>;
267 trig-conns@0 {
269 arm,trig-in-sigs = <4 5 6 7>;
270 arm,trig-in-types = <ETM_EXTOUT
274 arm,trig-out-sigs = <4 5 6 7>;
275 arm,trig-out-types = <ETM_EXTIN
279 arm,cs-dev-assoc = <&etm0>;
282 trig-conns@1 {
285 arm,trig-in-sigs = <0 1>;
286 arm,trig-in-types = <PE_DBGTRIGGER
288 arm,trig-out-sigs=<0 1 2 >;
289 arm,trig-out-types = <PE_EDBGREQ
293 arm,trig-filters = <0>;
296 # Implementation defined CTI - non CoreSight component connections.
297 - |
299 compatible = "arm,coresight-cti", "arm,primecell";
303 clock-names = "apb_pclk";
305 #address-cells = <1>;
306 #size-cells = <0>;
308 trig-conns@0 {
310 arm,trig-in-sigs=<0>;
311 arm,trig-in-types=<GEN_INTREQ>;
312 arm,trig-out-sigs=<0>;
313 arm,trig-out-types=<GEN_HALTREQ>;
314 arm,trig-conn-name = "sys_profiler";
317 trig-conns@1 {
319 arm,trig-out-sigs=<2 3>;
320 arm,trig-out-types=<GEN_HALTREQ GEN_RESTARTREQ>;
321 arm,trig-conn-name = "watchdog";
324 trig-conns@2 {
326 arm,trig-in-sigs=<1 6>;
327 arm,trig-in-types=<GEN_HALTREQ GEN_RESTARTREQ>;
328 arm,trig-conn-name = "g_counter";