bindings/arm/arm%2Cscmi.txt

2 ----------------------------------------------------------
17 - compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
18 - mboxes: List of phandle and mailbox channel specifiers. It should contain
22 - shmem : List of phandle pointing to the shared memory(SHM) area as per
24 - #address-cells : should be '1' if the device has sub-nodes, maps to
25 	  protocol identifier for a given sub-node.
26 - #size-cells : should be '0' as 'reg' property doesn't have any size
28 - arm,smc-id : SMC id required when using smc or hvc transports
32 - mbox-names: shall be "tx" or "rx" depending on mboxes entries.
41 Each protocol supported shall have a sub-node with corresponding compatible
44 mboxes, mbox-names and shmem shall be present in the sub-node corresponding
48 ------------------------------------------------------------
53 - #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands.
56 ------------------------------------------------------------
62  - #power-domain-cells : Should be 1. Contains the device or the power
66 --------------------------------------------------------------
67 SCMI provides an API to access the various sensors on the SoC.
70 - #thermal-sensor-cells: should be set to 1. This property follows the
78 ------------------------------------------------------------
84  - #reset-cells : Should be 1. Contains the reset domain ID value used
88 -------------------------------
93 The properties should follow the generic mmio-sram description found in [4]
95 Each sub-node represents the reserved area for SCMI.
97 Required sub-node properties:
98 - reg : The base offset and size of the reserved area with the SRAM
99 - compatible : should be "arm,scmi-shmem" for Non-secure SRAM based
103 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
104 [2] Documentation/devicetree/bindings/power/power-domain.yaml
112 	compatible = "mmio-sram";
113 	reg = <0x0 0x50000000 0x0 0x10000>;
115 	#address-cells = <1>;
116 	#size-cells = <1>;
119 	cpu_scp_lpri: scp-shmem@0 {
120 		compatible = "arm,scmi-shmem";
121 		reg = <0x0 0x200>;
124 	cpu_scp_hpri: scp-shmem@200 {
125 		compatible = "arm,scmi-shmem";
126 		reg = <0x200 0x200>;
132 	#mbox-cells = <1>;
133 	reg = <0x0 0x40000000 0x0 0x10000>;
143 		mbox-names = "tx", "rx";
145 		#address-cells = <1>;
146 		#size-cells = <0>;
149 			reg = <0x11>;
150 			#power-domain-cells = <1>;
154 			reg = <0x13>;
155 			#clock-cells = <1>;
159 			reg = <0x14>;
160 			#clock-cells = <1>;
164 			reg = <0x15>;
165 			#thermal-sensor-cells = <1>;
169 			reg = <0x16>;
170 			#reset-cells = <1>;
177 	reg = <0 0>;
183 	reg = <0 0x7ff60000 0 0x1000>;
185 	power-domains = <&scmi_devpd 1>;
189 thermal-zones {
191 		polling-delay-passive = <100>;
192 		polling-delay = <1000>;
194 		thermal-sensors = <&scmi_sensors0 3>;