Documentation/admin-guide/ras.rst

14   is the probability that a system will produce correct outputs.
99 will translate the error message to the silkscreen or component label for
232 CE events only, the system can and will continue to operate as no data
284 and one MC driver will be loaded. Both the CORE and the MC driver (or
347 controllers. The following example will assume 2 channels:
386 ranked DIMMs are placed in slots DIMM_A0 and DIMM_B0, then they will
387 have just one csrow (csrow0) and csrow1 will be empty. The pattern
394 ``/sys/devices/system/edac/mc``, each memory controller will be
503 	this counter will not have a chance to increment, since EDAC
504 	will panic the system.
517 	This attribute file will display what type of DRAM device is
528 	This attribute file will display what type of Error detection
560 	This attribute file will display what type of memory is currently
579 When CONFIG_EDAC_LEGACY_SYSFS is enabled, sysfs will contain the ``csrowX``
592 	this counter will not have a chance to increment, since EDAC
593 	will panic the system.
614 	This attribute file will display what type of memory is currently
624 	This attribute file will display what type of Error detection
630 	This attribute file will display what type of DRAM device is
642 	This attribute file will display the count of CEs on this
648 	This attribute file will display the count of UEs on this
671 	This attribute file will display the count of CEs on this
678 	This attribute file will display the count of UEs on this
700 If logging for UEs and CEs is enabled, then system logs will contain
736 Both UEs and CEs with no info will lack all but memory controller, error
775 	This attribute file will display the number of parity errors that
784 	An uncorrectable error will cause a machine panic.  This is usually
787 	system context might be so mangled that continuing will lead to further
788 	corruption. If the kernel has MCE configured, then EDAC will never
805 	will be accumulated even when UE logging is disabled.
821 	CE statistics will be accumulated even when CE logging is disabled.
881 will appear.
970 	reset-counters		writing ANY thing to this control will
990 This chapter will cover the differences of the enhanced memory controllers
1022    The driver will map it as::
1045          channel = the channel that will generate an error;
1066           specifies what bits will have troubles,
1069        specifies what ECC cache section will get the error::
1087    Datasheet states that the error will only be generated after a write on an
1088    address that matches inject_addrmatch. It seems, however, that reading will
1091    For example, the following code will generate an error for any write access
1104    The generated error message will look like::
1130    dimm number will increment the same counter.
1138    The hardware will increment udimm0 for an error at the first dimm at either
1141    The hardware will increment udimm1 for an error at the second dimm at either
1144    The hardware will increment udimm2 for an error at the third dimm at either