Lines Matching full:7
130 #define WM8990_LIN34_ENA_BIT 7
154 #define WM8990_LOPGA_ENA_BIT 7
287 #define WM8990_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */
293 #define WM8990_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */
323 #define WM8990_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */
330 #define WM8990_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */
430 #define WM8990_LI12MUTE_BIT 7
440 #define WM8990_LI34MUTE_BIT 7
451 #define WM8990_RI12MUTE_BIT 7
462 #define WM8990_RI34MUTE_BIT 7
473 #define WM8990_LOZC_BIT 7
481 #define WM8990_ROZC_BIT 7
517 #define WM8990_LOPGAZC_BIT 7
526 #define WM8990_ROPGAZC_BIT 7
553 #define WM8990_SPKZC_SHIFT 7 /* SPKZC */
569 #define WM8990_LMP4_BIT 7 /* LMP4 */
591 #define WM8990_L34MNBST_BIT 7
605 #define WM8990_R34MNBST_BIT 7
637 #define WM8990_LRBLO_BIT 7
655 #define WM8990_RLBRO_BIT 7
712 #define WM8990_VSEL_MASK 0x0180 /* VSEL - [8:7] */
756 #define WM8990_LB2SPK_BIT 7
799 #define WM8990_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */
814 #define WM8990_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */
819 #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */