soc/codecs/tlv320aic3x.c

367 	SOC_DOUBLE_R("Line Playback Switch", LLOPM_CTRL, RLOPM_CTRL, 3,
369 	SOC_SINGLE("Mono Playback Switch", MONOLOPM_CTRL, 3, 0x01, 0),
370 	SOC_DOUBLE_R("HP Playback Switch", HPLOUT_CTRL, HPROUT_CTRL, 3,
372 	SOC_DOUBLE_R("HPCOM Playback Switch", HPLCOM_CTRL, HPRCOM_CTRL, 3,
379 	SOC_DOUBLE_R("AGC Switch", LAGC_CTRL_A, RAGC_CTRL_A, 7, 0x01, 0),
384 	SOC_DOUBLE_R("PGA Capture Switch", LADC_VOL, RADC_VOL, 7, 0x01, 1),
415 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_LLOPM_VOL, 7, 1, 0),
416 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_LLOPM_VOL, 7, 1, 0),
417 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_LLOPM_VOL, 7, 1, 0),
418 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_LLOPM_VOL, 7, 1, 0),
419 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_LLOPM_VOL, 7, 1, 0),
420 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_LLOPM_VOL, 7, 1, 0),
425 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_RLOPM_VOL, 7, 1, 0),
426 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_RLOPM_VOL, 7, 1, 0),
427 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_RLOPM_VOL, 7, 1, 0),
428 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_RLOPM_VOL, 7, 1, 0),
429 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_RLOPM_VOL, 7, 1, 0),
430 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_RLOPM_VOL, 7, 1, 0),
435 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_MONOLOPM_VOL, 7, 1, 0),
436 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_MONOLOPM_VOL, 7, 1, 0),
437 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_MONOLOPM_VOL, 7, 1, 0),
438 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_MONOLOPM_VOL, 7, 1, 0),
439 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_MONOLOPM_VOL, 7, 1, 0),
440 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_MONOLOPM_VOL, 7, 1, 0),
445 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPLOUT_VOL, 7, 1, 0),
446 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPLOUT_VOL, 7, 1, 0),
447 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPLOUT_VOL, 7, 1, 0),
448 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPLOUT_VOL, 7, 1, 0),
449 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPLOUT_VOL, 7, 1, 0),
450 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPLOUT_VOL, 7, 1, 0),
455 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPROUT_VOL, 7, 1, 0),
456 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPROUT_VOL, 7, 1, 0),
457 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPROUT_VOL, 7, 1, 0),
458 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPROUT_VOL, 7, 1, 0),
459 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPROUT_VOL, 7, 1, 0),
460 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPROUT_VOL, 7, 1, 0),
465 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPLCOM_VOL, 7, 1, 0),
466 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPLCOM_VOL, 7, 1, 0),
467 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPLCOM_VOL, 7, 1, 0),
468 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPLCOM_VOL, 7, 1, 0),
469 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPLCOM_VOL, 7, 1, 0),
470 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPLCOM_VOL, 7, 1, 0),
475 	SOC_DAPM_SINGLE("Line2L Bypass Switch", LINE2L_2_HPRCOM_VOL, 7, 1, 0),
476 	SOC_DAPM_SINGLE("PGAL Bypass Switch", PGAL_2_HPRCOM_VOL, 7, 1, 0),
477 	SOC_DAPM_SINGLE("DACL1 Switch", DACL1_2_HPRCOM_VOL, 7, 1, 0),
478 	SOC_DAPM_SINGLE("Line2R Bypass Switch", LINE2R_2_HPRCOM_VOL, 7, 1, 0),
479 	SOC_DAPM_SINGLE("PGAR Bypass Switch", PGAR_2_HPRCOM_VOL, 7, 1, 0),
480 	SOC_DAPM_SINGLE("DACR1 Switch", DACR1_2_HPRCOM_VOL, 7, 1, 0),
485 	SOC_DAPM_SINGLE_AIC3X("Line1L Switch", LINE1L_2_LADC_CTRL, 3, 1, 1),
486 	SOC_DAPM_SINGLE_AIC3X("Line1R Switch", LINE1R_2_LADC_CTRL, 3, 1, 1),
487 	SOC_DAPM_SINGLE_AIC3X("Line2L Switch", LINE2L_2_LADC_CTRL, 3, 1, 1),
488 	SOC_DAPM_SINGLE_AIC3X("Mic3L Switch", MIC3LR_2_LADC_CTRL, 4, 1, 1),
489 	SOC_DAPM_SINGLE_AIC3X("Mic3R Switch", MIC3LR_2_LADC_CTRL, 0, 1, 1),
494 	SOC_DAPM_SINGLE_AIC3X("Line1R Switch", LINE1R_2_RADC_CTRL, 3, 1, 1),
495 	SOC_DAPM_SINGLE_AIC3X("Line1L Switch", LINE1L_2_RADC_CTRL, 3, 1, 1),
496 	SOC_DAPM_SINGLE_AIC3X("Line2R Switch", LINE2R_2_RADC_CTRL, 3, 1, 1),
497 	SOC_DAPM_SINGLE_AIC3X("Mic3L Switch", MIC3LR_2_RADC_CTRL, 4, 1, 1),
498 	SOC_DAPM_SINGLE_AIC3X("Mic3R Switch", MIC3LR_2_RADC_CTRL, 0, 1, 1),
663 	{"Left PGA Mixer", "Line1L Switch", "Left Line1L Mux"},
664 	{"Left PGA Mixer", "Line1R Switch", "Left Line1R Mux"},
665 	{"Left PGA Mixer", "Line2L Switch", "Left Line2L Mux"},
666 	{"Left PGA Mixer", "Mic3L Switch", "MIC3L"},
667 	{"Left PGA Mixer", "Mic3R Switch", "MIC3R"},
679 	{"Right PGA Mixer", "Line1L Switch", "Right Line1L Mux"},
680 	{"Right PGA Mixer", "Line1R Switch", "Right Line1R Mux"},
681 	{"Right PGA Mixer", "Line2R Switch", "Right Line2R Mux"},
682 	{"Right PGA Mixer", "Mic3L Switch", "MIC3L"},
683 	{"Right PGA Mixer", "Mic3R Switch", "MIC3R"},
707 	{"Left Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
708 	{"Left Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
709 	{"Left Line Mixer", "DACL1 Switch", "Left DAC Mux"},
710 	{"Left Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
711 	{"Left Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
712 	{"Left Line Mixer", "DACR1 Switch", "Right DAC Mux"},
719 	{"Right Line Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
720 	{"Right Line Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
721 	{"Right Line Mixer", "DACL1 Switch", "Left DAC Mux"},
722 	{"Right Line Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
723 	{"Right Line Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
724 	{"Right Line Mixer", "DACR1 Switch", "Right DAC Mux"},
731 	{"Mono Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
732 	{"Mono Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
733 	{"Mono Mixer", "DACL1 Switch", "Left DAC Mux"},
734 	{"Mono Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
735 	{"Mono Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
736 	{"Mono Mixer", "DACR1 Switch", "Right DAC Mux"},
742 	{"Left HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
743 	{"Left HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
744 	{"Left HP Mixer", "DACL1 Switch", "Left DAC Mux"},
745 	{"Left HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
746 	{"Left HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
747 	{"Left HP Mixer", "DACR1 Switch", "Right DAC Mux"},
754 	{"Right HP Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
755 	{"Right HP Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
756 	{"Right HP Mixer", "DACL1 Switch", "Left DAC Mux"},
757 	{"Right HP Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
758 	{"Right HP Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
759 	{"Right HP Mixer", "DACR1 Switch", "Right DAC Mux"},
766 	{"Left HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
767 	{"Left HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
768 	{"Left HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
769 	{"Left HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
770 	{"Left HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
771 	{"Left HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
780 	{"Right HPCOM Mixer", "Line2L Bypass Switch", "Left Line2L Mux"},
781 	{"Right HPCOM Mixer", "PGAL Bypass Switch", "Left PGA Mixer"},
782 	{"Right HPCOM Mixer", "DACL1 Switch", "Left DAC Mux"},
783 	{"Right HPCOM Mixer", "Line2R Bypass Switch", "Right Line2R Mux"},
784 	{"Right HPCOM Mixer", "PGAR Bypass Switch", "Right PGA Mixer"},
785 	{"Right HPCOM Mixer", "DACR1 Switch", "Right DAC Mux"},
839 	switch (params_format(params)) {  in aic3x_hw_params()
1016 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {  in aic3x_set_dai_fmt()
1033 	switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |  in aic3x_set_dai_fmt()
1157 	switch (level) {  in aic3x_set_bias_level()