Lines Matching +full:dmic +full:- +full:sample +full:- +full:rate
2 * cs42l73.c -- CS42L73 ALSA Soc Audio driver
28 #include <sound/soc-dapm.h>
46 { 1, 0x42 }, /* r01 - Device ID A&B */
47 { 2, 0xA7 }, /* r02 - Device ID C&D */
48 { 3, 0x30 }, /* r03 - Device ID E */
49 { 6, 0xF1 }, /* r06 - Power Ctl 1 */
50 { 7, 0xDF }, /* r07 - Power Ctl 2 */
51 { 8, 0x3F }, /* r08 - Power Ctl 3 */
52 { 9, 0x50 }, /* r09 - Charge Pump Freq */
53 { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */
54 { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */
55 { 12, 0x00 }, /* r0C - Aux PCM Ctl */
56 { 13, 0x15 }, /* r0D - Aux PCM Master Clock Ctl */
57 { 14, 0x00 }, /* r0E - Audio PCM Ctl */
58 { 15, 0x15 }, /* r0F - Audio PCM Master Clock Ctl */
59 { 16, 0x00 }, /* r10 - Voice PCM Ctl */
60 { 17, 0x15 }, /* r11 - Voice PCM Master Clock Ctl */
61 { 18, 0x00 }, /* r12 - Voice/Aux Sample Rate */
62 { 19, 0x06 }, /* r13 - Misc I/O Path Ctl */
63 { 20, 0x00 }, /* r14 - ADC Input Path Ctl */
64 { 21, 0x00 }, /* r15 - MICA Preamp, PGA Volume */
65 { 22, 0x00 }, /* r16 - MICB Preamp, PGA Volume */
66 { 23, 0x00 }, /* r17 - Input Path A Digital Volume */
67 { 24, 0x00 }, /* r18 - Input Path B Digital Volume */
68 { 25, 0x00 }, /* r19 - Playback Digital Ctl */
69 { 26, 0x00 }, /* r1A - HP/LO Left Digital Volume */
70 { 27, 0x00 }, /* r1B - HP/LO Right Digital Volume */
71 { 28, 0x00 }, /* r1C - Speakerphone Digital Volume */
72 { 29, 0x00 }, /* r1D - Ear/SPKLO Digital Volume */
73 { 30, 0x00 }, /* r1E - HP Left Analog Volume */
74 { 31, 0x00 }, /* r1F - HP Right Analog Volume */
75 { 32, 0x00 }, /* r20 - LO Left Analog Volume */
76 { 33, 0x00 }, /* r21 - LO Right Analog Volume */
77 { 34, 0x00 }, /* r22 - Stereo Input Path Advisory Volume */
78 { 35, 0x00 }, /* r23 - Aux PCM Input Advisory Volume */
79 { 36, 0x00 }, /* r24 - Audio PCM Input Advisory Volume */
80 { 37, 0x00 }, /* r25 - Voice PCM Input Advisory Volume */
81 { 38, 0x00 }, /* r26 - Limiter Attack Rate HP/LO */
82 { 39, 0x7F }, /* r27 - Limter Ctl, Release Rate HP/LO */
83 { 40, 0x00 }, /* r28 - Limter Threshold HP/LO */
84 { 41, 0x00 }, /* r29 - Limiter Attack Rate Speakerphone */
85 { 42, 0x3F }, /* r2A - Limter Ctl, Release Rate Speakerphone */
86 { 43, 0x00 }, /* r2B - Limter Threshold Speakerphone */
87 { 44, 0x00 }, /* r2C - Limiter Attack Rate Ear/SPKLO */
88 { 45, 0x3F }, /* r2D - Limter Ctl, Release Rate Ear/SPKLO */
89 { 46, 0x00 }, /* r2E - Limter Threshold Ear/SPKLO */
90 { 47, 0x00 }, /* r2F - ALC Enable, Attack Rate Left/Right */
91 { 48, 0x3F }, /* r30 - ALC Release Rate Left/Right */
92 { 49, 0x00 }, /* r31 - ALC Threshold Left/Right */
93 { 50, 0x00 }, /* r32 - Noise Gate Ctl Left/Right */
94 { 51, 0x00 }, /* r33 - ALC/NG Misc Ctl */
95 { 52, 0x18 }, /* r34 - Mixer Ctl */
96 { 53, 0x3F }, /* r35 - HP/LO Left Mixer Input Path Volume */
97 { 54, 0x3F }, /* r36 - HP/LO Right Mixer Input Path Volume */
98 { 55, 0x3F }, /* r37 - HP/LO Left Mixer Aux PCM Volume */
99 { 56, 0x3F }, /* r38 - HP/LO Right Mixer Aux PCM Volume */
100 { 57, 0x3F }, /* r39 - HP/LO Left Mixer Audio PCM Volume */
101 { 58, 0x3F }, /* r3A - HP/LO Right Mixer Audio PCM Volume */
102 { 59, 0x3F }, /* r3B - HP/LO Left Mixer Voice PCM Mono Volume */
103 { 60, 0x3F }, /* r3C - HP/LO Right Mixer Voice PCM Mono Volume */
104 { 61, 0x3F }, /* r3D - Aux PCM Left Mixer Input Path Volume */
105 { 62, 0x3F }, /* r3E - Aux PCM Right Mixer Input Path Volume */
106 { 63, 0x3F }, /* r3F - Aux PCM Left Mixer Volume */
107 { 64, 0x3F }, /* r40 - Aux PCM Left Mixer Volume */
108 { 65, 0x3F }, /* r41 - Aux PCM Left Mixer Audio PCM L Volume */
109 { 66, 0x3F }, /* r42 - Aux PCM Right Mixer Audio PCM R Volume */
110 { 67, 0x3F }, /* r43 - Aux PCM Left Mixer Voice PCM Volume */
111 { 68, 0x3F }, /* r44 - Aux PCM Right Mixer Voice PCM Volume */
112 { 69, 0x3F }, /* r45 - Audio PCM Left Input Path Volume */
113 { 70, 0x3F }, /* r46 - Audio PCM Right Input Path Volume */
114 { 71, 0x3F }, /* r47 - Audio PCM Left Mixer Aux PCM L Volume */
115 { 72, 0x3F }, /* r48 - Audio PCM Right Mixer Aux PCM R Volume */
116 { 73, 0x3F }, /* r49 - Audio PCM Left Mixer Volume */
117 { 74, 0x3F }, /* r4A - Audio PCM Right Mixer Volume */
118 { 75, 0x3F }, /* r4B - Audio PCM Left Mixer Voice PCM Volume */
119 { 76, 0x3F }, /* r4C - Audio PCM Right Mixer Voice PCM Volume */
120 { 77, 0x3F }, /* r4D - Voice PCM Left Input Path Volume */
121 { 78, 0x3F }, /* r4E - Voice PCM Right Input Path Volume */
122 { 79, 0x3F }, /* r4F - Voice PCM Left Mixer Aux PCM L Volume */
123 { 80, 0x3F }, /* r50 - Voice PCM Right Mixer Aux PCM R Volume */
124 { 81, 0x3F }, /* r51 - Voice PCM Left Mixer Audio PCM L Volume */
125 { 82, 0x3F }, /* r52 - Voice PCM Right Mixer Audio PCM R Volume */
126 { 83, 0x3F }, /* r53 - Voice PCM Left Mixer Voice PCM Volume */
127 { 84, 0x3F }, /* r54 - Voice PCM Right Mixer Voice PCM Volume */
128 { 85, 0xAA }, /* r55 - Mono Mixer Ctl */
129 { 86, 0x3F }, /* r56 - SPK Mono Mixer Input Path Volume */
130 { 87, 0x3F }, /* r57 - SPK Mono Mixer Aux PCM Mono/L/R Volume */
131 { 88, 0x3F }, /* r58 - SPK Mono Mixer Audio PCM Mono/L/R Volume */
132 { 89, 0x3F }, /* r59 - SPK Mono Mixer Voice PCM Mono Volume */
133 { 90, 0x3F }, /* r5A - SPKLO Mono Mixer Input Path Mono Volume */
134 { 91, 0x3F }, /* r5B - SPKLO Mono Mixer Aux Mono/L/R Volume */
135 { 92, 0x3F }, /* r5C - SPKLO Mono Mixer Audio Mono/L/R Volume */
136 { 93, 0x3F }, /* r5D - SPKLO Mono Mixer Voice Mono Volume */
137 { 94, 0x00 }, /* r5E - Interrupt Mask 1 */
138 { 95, 0x00 }, /* r5F - Interrupt Mask 2 */
257 0, 13, TLV_DB_SCALE_ITEM(-7600, 200, 0),
258 14, 75, TLV_DB_SCALE_ITEM(-4900, 100, 0),
263 static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0);
265 static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0);
267 static DECLARE_TLV_DB_SCALE(micpga_tlv, -600, 50, 0);
271 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0),
272 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0),
275 static const DECLARE_TLV_DB_SCALE(attn_tlv, -6300, 100, 1);
297 SOC_DAPM_SINGLE("DMIC Left Input", CS42L73_PWRCTL1,
304 SOC_DAPM_SINGLE("DMIC Right Input", CS42L73_PWRCTL1,
366 "Stereo", "Mono A", "Mono B", "Swap A-B"};
450 SOC_SINGLE("PGA Soft-Ramp Switch", CS42L73_MIOPC, 3, 1, 0),
452 SOC_SINGLE("Digital Soft-Ramp Switch", CS42L73_MIOPC, 1, 1, 0),
453 SOC_SINGLE("Analog Output Soft-Ramp Switch", CS42L73_MIOPC, 0, 1, 0),
458 SOC_SINGLE("HL Limiter Attack Rate", CS42L73_LIMARATEHL, 0, 0x3F,
460 SOC_SINGLE("HL Limiter Release Rate", CS42L73_LIMRRATEHL, 0,
474 SOC_SINGLE("SPK Limiter Attack Rate Volume", CS42L73_LIMARATESPK, 0,
476 SOC_SINGLE("SPK Limiter Release Rate Volume", CS42L73_LIMRRATESPK, 0,
487 SOC_SINGLE("ESL Limiter Attack Rate Volume", CS42L73_LIMARATEESL, 0,
489 SOC_SINGLE("ESL Limiter Release Rate Volume", CS42L73_LIMRRATEESL, 0,
498 SOC_SINGLE("ALC Attack Rate Volume", CS42L73_ALCARATE, 0, 0x3F, 0),
499 SOC_SINGLE("ALC Release Rate Volume", CS42L73_ALCRRATE, 0, 0x3F, 0),
518 SOC_DOUBLE_R_TLV("XSP-IP Volume",
521 SOC_DOUBLE_R_TLV("XSP-XSP Volume",
524 SOC_DOUBLE_R_TLV("XSP-ASP Volume",
527 SOC_DOUBLE_R_TLV("XSP-VSP Volume",
531 SOC_DOUBLE_R_TLV("ASP-IP Volume",
534 SOC_DOUBLE_R_TLV("ASP-XSP Volume",
537 SOC_DOUBLE_R_TLV("ASP-ASP Volume",
540 SOC_DOUBLE_R_TLV("ASP-VSP Volume",
544 SOC_DOUBLE_R_TLV("VSP-IP Volume",
547 SOC_DOUBLE_R_TLV("VSP-XSP Volume",
550 SOC_DOUBLE_R_TLV("VSP-ASP Volume",
553 SOC_DOUBLE_R_TLV("VSP-VSP Volume",
557 SOC_DOUBLE_R_TLV("HL-IP Volume",
560 SOC_DOUBLE_R_TLV("HL-XSP Volume",
563 SOC_DOUBLE_R_TLV("HL-ASP Volume",
566 SOC_DOUBLE_R_TLV("HL-VSP Volume",
570 SOC_SINGLE_TLV("SPK-IP Mono Volume",
572 SOC_SINGLE_TLV("SPK-XSP Mono Volume",
574 SOC_SINGLE_TLV("SPK-ASP Mono Volume",
576 SOC_SINGLE_TLV("SPK-VSP Mono Volume",
579 SOC_SINGLE_TLV("ESL-IP Mono Volume",
581 SOC_SINGLE_TLV("ESL-XSP Mono Volume",
583 SOC_SINGLE_TLV("ESL-ASP Mono Volume",
585 SOC_SINGLE_TLV("ESL-VSP Mono Volume",
623 SND_SOC_DAPM_ADC("DMIC Left", NULL, CS42L73_PWRCTL1, 6, 1),
624 SND_SOC_DAPM_ADC("DMIC Right", NULL, CS42L73_PWRCTL1, 4, 1),
663 SND_SOC_DAPM_MUX("ESL-XSP Mux", SND_SOC_NOPM,
666 SND_SOC_DAPM_MUX("ESL-ASP Mux", SND_SOC_NOPM,
669 SND_SOC_DAPM_MUX("SPK-ASP Mux", SND_SOC_NOPM,
672 SND_SOC_DAPM_MUX("SPK-XSP Mux", SND_SOC_NOPM,
709 {"ESL DAC", "ESL-ASP Mono Volume", "ESL Mixer"},
710 {"ESL DAC", "ESL-XSP Mono Volume", "ESL Mixer"},
711 {"ESL DAC", "ESL-VSP Mono Volume", "VSPIN"},
713 {"ESL DAC", "ESL-IP Mono Volume", "Input Left Capture"},
714 {"ESL DAC", "ESL-IP Mono Volume", "Input Right Capture"},
716 {"ESL Mixer", NULL, "ESL-ASP Mux"},
717 {"ESL Mixer", NULL, "ESL-XSP Mux"},
719 {"ESL-ASP Mux", "Left", "ASPINL"},
720 {"ESL-ASP Mux", "Right", "ASPINR"},
721 {"ESL-ASP Mux", "Mono Mix", "ASPINM"},
723 {"ESL-XSP Mux", "Left", "XSPINL"},
724 {"ESL-XSP Mux", "Right", "XSPINR"},
725 {"ESL-XSP Mux", "Mono Mix", "XSPINM"},
731 {"SPK DAC", "SPK-ASP Mono Volume", "SPK Mixer"},
732 {"SPK DAC", "SPK-XSP Mono Volume", "SPK Mixer"},
733 {"SPK DAC", "SPK-VSP Mono Volume", "VSPIN"},
735 {"SPK DAC", "SPK-IP Mono Volume", "Input Left Capture"},
736 {"SPK DAC", "SPK-IP Mono Volume", "Input Right Capture"},
738 {"SPK Mixer", NULL, "SPK-ASP Mux"},
739 {"SPK Mixer", NULL, "SPK-XSP Mux"},
741 {"SPK-ASP Mux", "Left", "ASPINL"},
742 {"SPK-ASP Mux", "Mono Mix", "ASPINM"},
743 {"SPK-ASP Mux", "Right", "ASPINR"},
745 {"SPK-XSP Mux", "Left", "XSPINL"},
746 {"SPK-XSP Mux", "Mono Mix", "XSPINM"},
747 {"SPK-XSP Mux", "Right", "XSPINR"},
760 {"HL Left DAC", "HL-XSP Volume", "HL Left Mixer"},
761 {"HL Right DAC", "HL-XSP Volume", "HL Right Mixer"},
762 {"HL Left DAC", "HL-ASP Volume", "HL Left Mixer"},
763 {"HL Right DAC", "HL-ASP Volume", "HL Right Mixer"},
764 {"HL Left DAC", "HL-VSP Volume", "HL Left Mixer"},
765 {"HL Right DAC", "HL-VSP Volume", "HL Right Mixer"},
767 {"HL Left DAC", "HL-IP Volume", "HL Left Mixer"},
768 {"HL Right DAC", "HL-IP Volume", "HL Right Mixer"},
796 {"Input Left Capture", "DMIC Left Input", "DMIC Left"},
797 {"Input Right Capture", "DMIC Right Input", "DMIC Right"},
803 {"ASPOUTL", "ASP-IP Volume", "ASPL Output Mixer"},
804 {"ASPOUTR", "ASP-IP Volume", "ASPR Output Mixer"},
810 {"XSPOUTL", "XSP-IP Volume", "XSPL Output Mixer"},
811 {"XSPOUTR", "XSP-IP Volume", "XSPR Output Mixer"},
820 {"VSPOUTL", "VSP-IP Volume", "VSPL Output Mixer"},
821 {"VSPOUTR", "VSP-IP Volume", "VSPR Output Mixer"},
834 /* MCLK, Sample Rate, xMMCC[5:0] */
905 return -EINVAL; in cs42l73_get_mclkx_coeff()
917 return -EINVAL; in cs42l73_get_mclk_coeff()
923 struct snd_soc_codec *codec = dai->codec; in cs42l73_set_mclk()
930 /* MCLKX -> MCLK */ in cs42l73_set_mclk()
936 dev_dbg(codec->dev, "MCLK%u %u <-> internal MCLK %u\n", in cs42l73_set_mclk()
937 priv->mclksel + 1, cs42l73_mclkx_coeffs[mclkx_coeff].mclkx, in cs42l73_set_mclk()
940 dmmcc = (priv->mclksel << 4) | in cs42l73_set_mclk()
945 priv->sysclk = mclkx_coeff; in cs42l73_set_mclk()
946 priv->mclk = mclk; in cs42l73_set_mclk()
954 struct snd_soc_codec *codec = dai->codec; in cs42l73_set_sysclk()
963 return -EINVAL; in cs42l73_set_sysclk()
967 dev_err(codec->dev, "Unable to set MCLK for dai %s\n", in cs42l73_set_sysclk()
968 dai->name); in cs42l73_set_sysclk()
969 return -EINVAL; in cs42l73_set_sysclk()
972 priv->mclksel = clk_id; in cs42l73_set_sysclk()
979 struct snd_soc_codec *codec = codec_dai->codec; in cs42l73_set_dai_fmt()
981 u8 id = codec_dai->id; in cs42l73_set_dai_fmt()
998 return -EINVAL; in cs42l73_set_dai_fmt()
1011 dev_err(codec->dev, in cs42l73_set_dai_fmt()
1013 return -EINVAL; in cs42l73_set_dai_fmt()
1016 dev_err(codec->dev, in cs42l73_set_dai_fmt()
1018 return -EINVAL; in cs42l73_set_dai_fmt()
1023 return -EINVAL; in cs42l73_set_dai_fmt()
1027 /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */ in cs42l73_set_dai_fmt()
1041 return -EINVAL; in cs42l73_set_dai_fmt()
1045 priv->config[id].spc = spc; in cs42l73_set_dai_fmt()
1046 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1056 static unsigned int cs42l73_get_xspfs_coeff(u32 rate) in cs42l73_get_xspfs_coeff() argument
1060 if (cs42l73_asrc_rates[i] == rate) in cs42l73_get_xspfs_coeff()
1092 struct snd_soc_pcm_runtime *rtd = substream->private_data; in cs42l73_pcm_hw_params()
1093 struct snd_soc_codec *codec = rtd->codec; in cs42l73_pcm_hw_params()
1095 int id = dai->id; in cs42l73_pcm_hw_params()
1099 if (priv->config[id].mmcc & MS_MASTER) { in cs42l73_pcm_hw_params()
1101 /* MCLK -> srate */ in cs42l73_pcm_hw_params()
1103 cs42l73_get_mclk_coeff(priv->mclk, srate); in cs42l73_pcm_hw_params()
1106 return -EINVAL; in cs42l73_pcm_hw_params()
1108 dev_dbg(codec->dev, in cs42l73_pcm_hw_params()
1110 id, priv->mclk, srate, in cs42l73_pcm_hw_params()
1113 priv->config[id].mmcc &= 0xC0; in cs42l73_pcm_hw_params()
1114 priv->config[id].mmcc |= cs42l73_mclk_coeffs[mclk_coeff].mmcc; in cs42l73_pcm_hw_params()
1115 priv->config[id].spc &= 0xFC; in cs42l73_pcm_hw_params()
1116 priv->config[id].spc |= MCK_SCLK_MCLK; in cs42l73_pcm_hw_params()
1119 priv->config[id].spc &= 0xFC; in cs42l73_pcm_hw_params()
1120 priv->config[id].spc |= MCK_SCLK_64FS; in cs42l73_pcm_hw_params()
1123 priv->config[id].srate = srate; in cs42l73_pcm_hw_params()
1125 snd_soc_write(codec, CS42L73_SPC(id), priv->config[id].spc); in cs42l73_pcm_hw_params()
1126 snd_soc_write(codec, CS42L73_MMCC(id), priv->config[id].mmcc); in cs42l73_pcm_hw_params()
1148 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { in cs42l73_set_bias_level()
1149 regcache_cache_only(cs42l73->regmap, false); in cs42l73_set_bias_level()
1150 regcache_sync(cs42l73->regmap); in cs42l73_set_bias_level()
1160 codec->dapm.bias_level = level; in cs42l73_set_bias_level()
1166 struct snd_soc_codec *codec = dai->codec; in cs42l73_set_tristate()
1167 int id = dai->id; in cs42l73_set_tristate()
1181 snd_pcm_hw_constraint_list(substream->runtime, 0, in cs42l73_pcm_startup()
1187 /* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */
1204 .name = "cs42l73-xsp",
1224 .name = "cs42l73-asp",
1244 .name = "cs42l73-vsp",
1283 codec->control_data = cs42l73->regmap; in cs42l73_probe()
1287 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); in cs42l73_probe()
1291 regcache_cache_only(cs42l73->regmap, true); in cs42l73_probe()
1295 cs42l73->mclksel = CS42L73_CLKID_MCLK1; /* MCLK1 as master clk */ in cs42l73_probe()
1296 cs42l73->mclk = 0; in cs42l73_probe()
1343 cs42l73 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l73_private), in cs42l73_i2c_probe()
1346 dev_err(&i2c_client->dev, "could not allocate codec\n"); in cs42l73_i2c_probe()
1347 return -ENOMEM; in cs42l73_i2c_probe()
1352 cs42l73->regmap = regmap_init_i2c(i2c_client, &cs42l73_regmap); in cs42l73_i2c_probe()
1353 if (IS_ERR(cs42l73->regmap)) { in cs42l73_i2c_probe()
1354 ret = PTR_ERR(cs42l73->regmap); in cs42l73_i2c_probe()
1355 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); in cs42l73_i2c_probe()
1359 ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_AB, ®); in cs42l73_i2c_probe()
1362 ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_CD, ®); in cs42l73_i2c_probe()
1365 ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_E, ®); in cs42l73_i2c_probe()
1370 ret = -ENODEV; in cs42l73_i2c_probe()
1371 dev_err(&i2c_client->dev, in cs42l73_i2c_probe()
1377 ret = regmap_read(cs42l73->regmap, CS42L73_REVID, ®); in cs42l73_i2c_probe()
1379 dev_err(&i2c_client->dev, "Get Revision ID failed\n"); in cs42l73_i2c_probe()
1383 dev_info(&i2c_client->dev, in cs42l73_i2c_probe()
1386 regcache_cache_only(cs42l73->regmap, true); in cs42l73_i2c_probe()
1388 ret = snd_soc_register_codec(&i2c_client->dev, in cs42l73_i2c_probe()
1396 regmap_exit(cs42l73->regmap); in cs42l73_i2c_probe()
1406 snd_soc_unregister_codec(&client->dev); in cs42l73_i2c_remove()
1407 regmap_exit(cs42l73->regmap); in cs42l73_i2c_remove()