Lines Matching +full:chip +full:- +full:to +full:- +full:chip
3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
32 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
34 static int set_professional_spdif(struct echoaudio *chip, char prof);
35 static int set_digital_mode(struct echoaudio *chip, u8 mode);
36 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
37 static int check_asic_status(struct echoaudio *chip);
40 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) in init_hw() argument
44 DE_INIT(("init_hw() - Mona\n")); in init_hw()
46 return -ENODEV; in init_hw()
48 if ((err = init_dsp_comm_page(chip))) { in init_hw()
49 DE_INIT(("init_hw - could not initialize DSP comm page\n")); in init_hw()
53 chip->device_id = device_id; in init_hw()
54 chip->subdevice_id = subdevice_id; in init_hw()
55 chip->bad_board = TRUE; in init_hw()
56 chip->input_clock_types = in init_hw()
59 chip->digital_modes = in init_hw()
65 if (chip->device_id == DEVICE_ID_56361) in init_hw()
66 chip->dsp_code_to_load = FW_MONA_361_DSP; in init_hw()
68 chip->dsp_code_to_load = FW_MONA_301_DSP; in init_hw()
70 if ((err = load_firmware(chip)) < 0) in init_hw()
72 chip->bad_board = FALSE; in init_hw()
80 static int set_mixer_defaults(struct echoaudio *chip) in set_mixer_defaults() argument
82 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; in set_mixer_defaults()
83 chip->professional_spdif = FALSE; in set_mixer_defaults()
84 chip->digital_in_automute = TRUE; in set_mixer_defaults()
85 return init_line_levels(chip); in set_mixer_defaults()
90 static u32 detect_input_clocks(const struct echoaudio *chip) in detect_input_clocks() argument
94 /* Map the DSP clock detect bits to the generic driver clock in detect_input_clocks()
96 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
115 both need to be loaded. */
116 static int load_asic(struct echoaudio *chip) in load_asic() argument
122 if (chip->asic_loaded) in load_asic()
127 if (chip->device_id == DEVICE_ID_56361) in load_asic()
132 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, asic); in load_asic()
136 chip->asic_code = asic; in load_asic()
140 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_EXTERNAL_ASIC, in load_asic()
146 err = check_asic_status(chip); in load_asic()
148 /* Set up the control register if the load succeeded - in load_asic()
152 err = write_control_reg(chip, control_reg, TRUE); in load_asic()
163 static int switch_asic(struct echoaudio *chip, char double_speed) in switch_asic() argument
168 /* Check the clock detect bits to see if this is in switch_asic()
169 a single-speed clock or a double-speed clock; load in switch_asic()
171 if (chip->device_id == DEVICE_ID_56361) { in switch_asic()
183 if (asic != chip->asic_code) { in switch_asic()
185 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, in switch_asic()
189 chip->asic_code = asic; in switch_asic()
197 static int set_sample_rate(struct echoaudio *chip, u32 rate) in set_sample_rate() argument
204 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()
205 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
206 "clock not set to CLK_CLOCKININTERNAL\n")); in set_sample_rate()
208 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
209 chip->sample_rate = rate; in set_sample_rate()
213 /* Now, check to see if the required ASIC is loaded */ in set_sample_rate()
215 if (chip->digital_mode == DIGITAL_MODE_ADAT) in set_sample_rate()
216 return -EINVAL; in set_sample_rate()
217 if (chip->device_id == DEVICE_ID_56361) in set_sample_rate()
222 if (chip->device_id == DEVICE_ID_56361) in set_sample_rate()
229 if (asic != chip->asic_code) { in set_sample_rate()
232 spin_unlock_irq(&chip->lock); in set_sample_rate()
233 err = load_asic_generic(chip, DSP_FNC_LOAD_MONA_PCI_CARD_ASIC, in set_sample_rate()
235 spin_lock_irq(&chip->lock); in set_sample_rate()
239 chip->asic_code = asic; in set_sample_rate()
245 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
283 return -EINVAL; in set_sample_rate()
288 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP */ in set_sample_rate()
289 chip->sample_rate = rate; in set_sample_rate()
292 return write_control_reg(chip, control_reg, force_write); in set_sample_rate()
297 static int set_input_clock(struct echoaudio *chip, u16 clock) in set_input_clock() argument
304 /* Prevent two simultaneous calls to switch_asic() */ in set_input_clock()
305 if (atomic_read(&chip->opencount)) in set_input_clock()
306 return -EAGAIN; in set_input_clock()
309 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
311 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
315 DE_ACT(("Set Mona clock to INTERNAL\n")); in set_input_clock()
316 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()
317 return set_sample_rate(chip, chip->sample_rate); in set_input_clock()
319 if (chip->digital_mode == DIGITAL_MODE_ADAT) in set_input_clock()
320 return -EAGAIN; in set_input_clock()
321 spin_unlock_irq(&chip->lock); in set_input_clock()
322 err = switch_asic(chip, clocks_from_dsp & in set_input_clock()
324 spin_lock_irq(&chip->lock); in set_input_clock()
327 DE_ACT(("Set Mona clock to SPDIF\n")); in set_input_clock()
335 DE_ACT(("Set Mona clock to WORD\n")); in set_input_clock()
336 spin_unlock_irq(&chip->lock); in set_input_clock()
337 err = switch_asic(chip, clocks_from_dsp & in set_input_clock()
339 spin_lock_irq(&chip->lock); in set_input_clock()
349 DE_ACT(("Set Mona clock to ADAT\n")); in set_input_clock()
350 if (chip->digital_mode != DIGITAL_MODE_ADAT) in set_input_clock()
351 return -EAGAIN; in set_input_clock()
357 return -EINVAL; in set_input_clock()
360 chip->input_clock = clock; in set_input_clock()
361 return write_control_reg(chip, control_reg, TRUE); in set_input_clock()
366 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) in dsp_set_digital_mode() argument
371 /* Set clock to "internal" if it's not compatible with the new mode */ in dsp_set_digital_mode()
376 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()
380 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
385 return -EINVAL; in dsp_set_digital_mode()
388 spin_lock_irq(&chip->lock); in dsp_set_digital_mode()
390 if (incompatible_clock) { /* Switch to 48KHz, internal */ in dsp_set_digital_mode()
391 chip->sample_rate = 48000; in dsp_set_digital_mode()
392 set_input_clock(chip, ECHO_CLOCK_INTERNAL); in dsp_set_digital_mode()
396 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
409 and set to 48 KHz */ in dsp_set_digital_mode()
410 if (chip->asic_code == FW_MONA_361_1_ASIC96 || in dsp_set_digital_mode()
411 chip->asic_code == FW_MONA_301_1_ASIC96) { in dsp_set_digital_mode()
412 set_sample_rate(chip, 48000); in dsp_set_digital_mode()
419 err = write_control_reg(chip, control_reg, FALSE); in dsp_set_digital_mode()
420 spin_unlock_irq(&chip->lock); in dsp_set_digital_mode()
423 chip->digital_mode = mode; in dsp_set_digital_mode()
425 DE_ACT(("set_digital_mode to %d\n", mode)); in dsp_set_digital_mode()