Lines Matching +full:chip +full:- +full:to +full:- +full:chip
3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
21 MA 02111-1307, USA.
25 Translation from C++ and adaptation for use in ALSA-Driver
31 static int write_control_reg(struct echoaudio *chip, u32 value, char force);
32 static int set_input_clock(struct echoaudio *chip, u16 clock);
33 static int set_professional_spdif(struct echoaudio *chip, char prof);
34 static int set_digital_mode(struct echoaudio *chip, u8 mode);
35 static int load_asic_generic(struct echoaudio *chip, u32 cmd, short asic);
36 static int check_asic_status(struct echoaudio *chip);
39 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) in init_hw() argument
43 DE_INIT(("init_hw() - Layla24\n")); in init_hw()
45 return -ENODEV; in init_hw()
47 if ((err = init_dsp_comm_page(chip))) { in init_hw()
48 DE_INIT(("init_hw - could not initialize DSP comm page\n")); in init_hw()
52 chip->device_id = device_id; in init_hw()
53 chip->subdevice_id = subdevice_id; in init_hw()
54 chip->bad_board = TRUE; in init_hw()
55 chip->has_midi = TRUE; in init_hw()
56 chip->dsp_code_to_load = FW_LAYLA24_DSP; in init_hw()
57 chip->input_clock_types = in init_hw()
60 chip->digital_modes = in init_hw()
65 if ((err = load_firmware(chip)) < 0) in init_hw()
67 chip->bad_board = FALSE; in init_hw()
69 if ((err = init_line_levels(chip)) < 0) in init_hw()
78 static int set_mixer_defaults(struct echoaudio *chip) in set_mixer_defaults() argument
80 chip->digital_mode = DIGITAL_MODE_SPDIF_RCA; in set_mixer_defaults()
81 chip->professional_spdif = FALSE; in set_mixer_defaults()
82 chip->digital_in_automute = TRUE; in set_mixer_defaults()
83 return init_line_levels(chip); in set_mixer_defaults()
88 static u32 detect_input_clocks(const struct echoaudio *chip) in detect_input_clocks() argument
92 /* Map the DSP clock detect bits to the generic driver clock detect bits */ in detect_input_clocks()
93 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in detect_input_clocks()
112 both need to be loaded. */
113 static int load_asic(struct echoaudio *chip) in load_asic() argument
117 if (chip->asic_loaded) in load_asic()
122 /* Give the DSP a few milliseconds to settle down */ in load_asic()
126 err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_PCI_CARD_ASIC, in load_asic()
131 chip->asic_code = FW_LAYLA24_2S_ASIC; in load_asic()
133 /* Now give the new ASIC a little time to set up */ in load_asic()
137 err = load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC, in load_asic()
142 /* Now give the external ASIC a little time to set up */ in load_asic()
146 err = check_asic_status(chip); in load_asic()
148 /* Set up the control register if the load succeeded - in load_asic()
151 err = write_control_reg(chip, GML_CONVERTER_ENABLE | GML_48KHZ, in load_asic()
160 static int set_sample_rate(struct echoaudio *chip, u32 rate) in set_sample_rate() argument
165 chip->digital_mode == DIGITAL_MODE_ADAT)) in set_sample_rate()
166 return -EINVAL; in set_sample_rate()
169 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()
170 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
171 "clock not set to CLK_CLOCKININTERNAL\n")); in set_sample_rate()
173 chip->comm_page->sample_rate = cpu_to_le32(rate); in set_sample_rate()
174 chip->sample_rate = rate; in set_sample_rate()
179 control_reg = le32_to_cpu(chip->comm_page->control_register); in set_sample_rate()
217 /* If this is a non-standard rate, then the driver needs to in set_sample_rate()
230 if (wait_handshake(chip)) in set_sample_rate()
231 return -EIO; in set_sample_rate()
233 chip->comm_page->sample_rate = in set_sample_rate()
234 cpu_to_le32(LAYLA24_MAGIC_NUMBER / base_rate - 2); in set_sample_rate()
236 clear_handshake(chip); in set_sample_rate()
237 send_vector(chip, DSP_VC_SET_LAYLA24_FREQUENCY_REG); in set_sample_rate()
242 chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ in set_sample_rate()
243 chip->sample_rate = rate; in set_sample_rate()
246 return write_control_reg(chip, control_reg, FALSE); in set_sample_rate()
251 static int set_input_clock(struct echoaudio *chip, u16 clock) in set_input_clock() argument
256 control_reg = le32_to_cpu(chip->comm_page->control_register) & in set_input_clock()
258 clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); in set_input_clock()
263 DE_ACT(("Set Layla24 clock to INTERNAL\n")); in set_input_clock()
264 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()
265 return set_sample_rate(chip, chip->sample_rate); in set_input_clock()
267 if (chip->digital_mode == DIGITAL_MODE_ADAT) in set_input_clock()
268 return -EAGAIN; in set_input_clock()
272 DE_ACT(("Set Layla24 clock to SPDIF\n")); in set_input_clock()
280 DE_ACT(("Set Layla24 clock to WORD\n")); in set_input_clock()
283 if (chip->digital_mode != DIGITAL_MODE_ADAT) in set_input_clock()
284 return -EAGAIN; in set_input_clock()
287 DE_ACT(("Set Layla24 clock to ADAT\n")); in set_input_clock()
291 return -EINVAL; in set_input_clock()
294 chip->input_clock = clock; in set_input_clock()
295 return write_control_reg(chip, control_reg, TRUE); in set_input_clock()
303 static int switch_asic(struct echoaudio *chip, short asic) in switch_asic() argument
307 /* Check to see if this is already loaded */ in switch_asic()
308 if (asic != chip->asic_code) { in switch_asic()
309 monitors = kmemdup(chip->comm_page->monitors, in switch_asic()
312 return -ENOMEM; in switch_asic()
314 memset(chip->comm_page->monitors, ECHOGAIN_MUTED, in switch_asic()
318 if (load_asic_generic(chip, DSP_FNC_LOAD_LAYLA24_EXTERNAL_ASIC, in switch_asic()
320 memcpy(chip->comm_page->monitors, monitors, in switch_asic()
323 return -EIO; in switch_asic()
325 chip->asic_code = asic; in switch_asic()
326 memcpy(chip->comm_page->monitors, monitors, MONITOR_ARRAY_SIZE); in switch_asic()
335 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode) in dsp_set_digital_mode() argument
341 /* Set clock to "internal" if it's not compatible with the new mode */ in dsp_set_digital_mode()
346 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()
351 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
357 return -EINVAL; in dsp_set_digital_mode()
360 if (incompatible_clock) { /* Switch to 48KHz, internal */ in dsp_set_digital_mode()
361 chip->sample_rate = 48000; in dsp_set_digital_mode()
362 spin_lock_irq(&chip->lock); in dsp_set_digital_mode()
363 set_input_clock(chip, ECHO_CLOCK_INTERNAL); in dsp_set_digital_mode()
364 spin_unlock_irq(&chip->lock); in dsp_set_digital_mode()
368 if (switch_asic(chip, asic) < 0) in dsp_set_digital_mode()
369 return -EIO; in dsp_set_digital_mode()
371 spin_lock_irq(&chip->lock); in dsp_set_digital_mode()
374 control_reg = le32_to_cpu(chip->comm_page->control_register); in dsp_set_digital_mode()
390 err = write_control_reg(chip, control_reg, TRUE); in dsp_set_digital_mode()
391 spin_unlock_irq(&chip->lock); in dsp_set_digital_mode()
394 chip->digital_mode = mode; in dsp_set_digital_mode()
396 DE_ACT(("set_digital_mode to %d\n", mode)); in dsp_set_digital_mode()