Lines Matching full:7
15 * 0.0.7
152 /* Here pins 0,1,2,3,4,,6 are output. 5,7 are input */
313 * SPDIF 0 User data [7:0]
334 …/* Record Map [7:0] (2 bits per channel) 0=mapped to channel 0, 1=mapped to channel 1, 2=mapped to…
347 #define CAPTURE_VOLUME2 0x62 /* Capture volume per channel 4-7 */
349 #define PLAYBACK_ROUTING1 0x63 /* Playback routing of channels 0-7. Effects AC3 ou…
356 /* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
357 * Host channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
358 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
359 * Host channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
360 * Host channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
361 * Host channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
362 * Host channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
363 * Host channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
368 /* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
369 * SRC channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
370 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
371 * SRC channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
372 * SRC channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
373 * SRC channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
374 * SRC channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
375 * SRC channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
380 * Invert SRC to SPDIF Mixer [7-0] (One bit per channel)
389 /* SRC Right volume [7:0]
450 * I2S Input 0 volume Right [7:0]
498 #define I2C_A_ADC_ADD_MASK 0x000000fe //The address is a 7 bit address
558 #define SPI_REG_MASK 0x1ff /* 16-bit SPI writes have a 7-bit address */
566 #define SPI_RDA3_REG 7
580 #define SPI_PL_BIT_R_M (0<<7) /* right channel = mute */
581 #define SPI_PL_BIT_R_L (1<<7) /* right channel = left */
582 #define SPI_PL_BIT_R_R (2<<7) /* right channel = right */
583 #define SPI_PL_BIT_R_C (3<<7) /* right channel = (L+R)/2 */
627 #define SPI_PHASE1_BIT (1<<7)