Lines Matching defs:ssb_sprom

19 struct ssb_sprom {  struct
20 u8 revision;
21 u8 il0mac[6]; /* MAC address for 802.11b/g */
22 u8 et0mac[6]; /* MAC address for Ethernet */
23 u8 et1mac[6]; /* MAC address for 802.11a */
24 u8 et0phyaddr; /* MII address for enet0 */
25 u8 et1phyaddr; /* MII address for enet1 */
26 u8 et0mdcport; /* MDIO for enet0 */
27 u8 et1mdcport; /* MDIO for enet1 */
28 u16 board_rev; /* Board revision number from SPROM. */
29 u8 country_code; /* Country Code */
30 u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
31 u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
32 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
33 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
34 u16 pa0b0;
35 u16 pa0b1;
36 u16 pa0b2;
37 u16 pa1b0;
38 u16 pa1b1;
39 u16 pa1b2;
40 u16 pa1lob0;
41 u16 pa1lob1;
42 u16 pa1lob2;
43 u16 pa1hib0;
44 u16 pa1hib1;
45 u16 pa1hib2;
46 u8 gpio0; /* GPIO pin 0 */
47 u8 gpio1; /* GPIO pin 1 */
48 u8 gpio2; /* GPIO pin 2 */
49 u8 gpio3; /* GPIO pin 3 */
50 u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
51 u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
52 u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
53 u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
54 u8 itssi_a; /* Idle TSSI Target for A-PHY */
55 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
56 u8 tri2g; /* 2.4GHz TX isolation */
57 u8 tri5gl; /* 5.2GHz TX isolation */
58 u8 tri5g; /* 5.3GHz TX isolation */
59 u8 tri5gh; /* 5.8GHz TX isolation */
60 u8 txpid2g[4]; /* 2GHz TX power index */
61 u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
62 u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
63 u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
64 u8 rxpo2g; /* 2GHz RX power offset */
65 u8 rxpo5g; /* 5GHz RX power offset */
66 u8 rssisav2g; /* 2GHz RSSI params */
67 u8 rssismc2g;
68 u8 rssismf2g;
69 u8 bxa2g; /* 2GHz BX arch */
70 u8 rssisav5g; /* 5GHz RSSI params */
71 u8 rssismc5g;
72 u8 rssismf5g;
73 u8 bxa5g; /* 5GHz BX arch */
74 u16 cck2gpo; /* CCK power offset */
75 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */
76 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */
77 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */
78 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */
79 u16 boardflags_lo; /* Board flags (bits 0-15) */
80 u16 boardflags_hi; /* Board flags (bits 16-31) */
81 u16 boardflags2_lo; /* Board flags (bits 32-47) */
82 u16 boardflags2_hi; /* Board flags (bits 48-63) */
88 struct {
95 } antenna_gain;
97 struct {
104 } fem;