Lines Matching defs:pci_dev

238 struct pci_dev {  struct
239 struct list_head bus_list; /* node in per-bus list */
240 struct pci_bus *bus; /* bus this device is on */
241 struct pci_bus *subordinate; /* bus this device bridges to */
243 void *sysdata; /* hook for sys-specific extension */
244 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
245 struct pci_slot *slot; /* Physical slot this device is in */
247 unsigned int devfn; /* encoded device & function index */
248 unsigned short vendor;
249 unsigned short device;
250 unsigned short subsystem_vendor;
251 unsigned short subsystem_device;
252 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
253 u8 revision; /* PCI revision, low byte of class word */
254 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
255 u8 pcie_cap; /* PCI-E capability offset */
256 u8 pcie_type:4; /* PCI-E device/port type */
257 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
258 u8 rom_base_reg; /* which config register controls the ROM */
259 u8 pin; /* which interrupt pin this device uses */
261 struct pci_driver *driver; /* which driver has allocated this device */
262 u64 dma_mask; /* Mask of the bits of bus address this
268 struct device_dma_parameters dma_parms;
270 pci_power_t current_state; /* Current operating state. In ACPI-speak,
273 int pm_cap; /* PM capability offset in the
275 unsigned int pme_support:5; /* Bitmask of states from which PME#
277 unsigned int pme_interrupt:1;
278 unsigned int pme_poll:1; /* Poll device's PME status bit */
279 unsigned int d1_support:1; /* Low power state D1 is supported */
280 unsigned int d2_support:1; /* Low power state D2 is supported */
281 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
282 unsigned int mmio_always_on:1; /* disallow turning off io/mem
284 unsigned int wakeup_prepared:1;
285 unsigned int d3_delay; /* D3->D0 transition time in ms */
288 struct pcie_link_state *link_state; /* ASPM link state. */
291 pci_channel_state_t error_state; /* current connectivity state */
292 struct device dev; /* Generic device interface */
294 int cfg_size; /* Size of configuration space */
300 unsigned int irq;
301 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
302 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]; /* FW-assigned addr */
328 pci_dev_flags_t dev_flags; argument
345 struct pci_dev *physfn; /* the PF this VF is associated with */ argument
351 static inline struct pci_dev *pci_physfn(struct pci_dev *dev) in pci_physfn() argument
373 struct pci_dev *pci_dev, char cap) in pci_find_saved_cap()
385 static inline void pci_add_saved_cap(struct pci_dev *pci_dev, in pci_add_saved_cap()
459 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) in pci_dev_msi_enabled()
464 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } in pci_dev_msi_enabled()