Lines Matching +full:0 +full:x2000
24 #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
25 #define WM8350_CSA_FLASH_CONTROL 0xAD
26 #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
27 #define WM8350_CSB_FLASH_CONTROL 0xAF
28 #define WM8350_DCDC_LDO_REQUESTED 0xB0
29 #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
30 #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
31 #define WM8350_POWER_CHECK_COMPARATOR 0xB3
32 #define WM8350_DCDC1_CONTROL 0xB4
33 #define WM8350_DCDC1_TIMEOUTS 0xB5
34 #define WM8350_DCDC1_LOW_POWER 0xB6
35 #define WM8350_DCDC2_CONTROL 0xB7
36 #define WM8350_DCDC2_TIMEOUTS 0xB8
37 #define WM8350_DCDC3_CONTROL 0xBA
38 #define WM8350_DCDC3_TIMEOUTS 0xBB
39 #define WM8350_DCDC3_LOW_POWER 0xBC
40 #define WM8350_DCDC4_CONTROL 0xBD
41 #define WM8350_DCDC4_TIMEOUTS 0xBE
42 #define WM8350_DCDC4_LOW_POWER 0xBF
43 #define WM8350_DCDC5_CONTROL 0xC0
44 #define WM8350_DCDC5_TIMEOUTS 0xC1
45 #define WM8350_DCDC6_CONTROL 0xC3
46 #define WM8350_DCDC6_TIMEOUTS 0xC4
47 #define WM8350_DCDC6_LOW_POWER 0xC5
48 #define WM8350_LIMIT_SWITCH_CONTROL 0xC7
49 #define WM8350_LDO1_CONTROL 0xC8
50 #define WM8350_LDO1_TIMEOUTS 0xC9
51 #define WM8350_LDO1_LOW_POWER 0xCA
52 #define WM8350_LDO2_CONTROL 0xCB
53 #define WM8350_LDO2_TIMEOUTS 0xCC
54 #define WM8350_LDO2_LOW_POWER 0xCD
55 #define WM8350_LDO3_CONTROL 0xCE
56 #define WM8350_LDO3_TIMEOUTS 0xCF
57 #define WM8350_LDO3_LOW_POWER 0xD0
58 #define WM8350_LDO4_CONTROL 0xD1
59 #define WM8350_LDO4_TIMEOUTS 0xD2
60 #define WM8350_LDO4_LOW_POWER 0xD3
61 #define WM8350_VCC_FAULT_MASKS 0xD7
62 #define WM8350_MAIN_BANDGAP_CONTROL 0xD8
63 #define WM8350_OSC_CONTROL 0xD9
64 #define WM8350_RTC_TICK_CONTROL 0xDA
65 #define WM8350_SECURITY 0xDB
66 #define WM8350_RAM_BIST_1 0xDC
67 #define WM8350_DCDC_LDO_STATUS 0xE1
68 #define WM8350_GPIO_PIN_STATUS 0xE6
70 #define WM8350_DCDC1_FORCE_PWM 0xF8
71 #define WM8350_DCDC3_FORCE_PWM 0xFA
72 #define WM8350_DCDC4_FORCE_PWM 0xFB
73 #define WM8350_DCDC6_FORCE_PWM 0xFD
76 * R172 (0xAC) - Current Sink Driver A
78 #define WM8350_CS1_HIB_MODE 0x1000
79 #define WM8350_CS1_HIB_MODE_MASK 0x1000
81 #define WM8350_CS1_ISEL_MASK 0x003F
82 #define WM8350_CS1_ISEL_SHIFT 0
84 /* Bit values for R172 (0xAC) */
85 #define WM8350_CS1_HIB_MODE_DISABLE 0
88 #define WM8350_CS1_ISEL_220M 0x3F
91 * R173 (0xAD) - CSA Flash control
93 #define WM8350_CS1_FLASH_MODE 0x8000
94 #define WM8350_CS1_TRIGSRC 0x4000
95 #define WM8350_CS1_DRIVE 0x2000
96 #define WM8350_CS1_FLASH_DUR_MASK 0x0300
97 #define WM8350_CS1_OFF_RAMP_MASK 0x0030
98 #define WM8350_CS1_ON_RAMP_MASK 0x0003
101 * R174 (0xAE) - Current Sink Driver B
103 #define WM8350_CS2_HIB_MODE 0x1000
104 #define WM8350_CS2_ISEL_MASK 0x003F
107 * R175 (0xAF) - CSB Flash control
109 #define WM8350_CS2_FLASH_MODE 0x8000
110 #define WM8350_CS2_TRIGSRC 0x4000
111 #define WM8350_CS2_DRIVE 0x2000
112 #define WM8350_CS2_FLASH_DUR_MASK 0x0300
113 #define WM8350_CS2_OFF_RAMP_MASK 0x0030
114 #define WM8350_CS2_ON_RAMP_MASK 0x0003
117 * R176 (0xB0) - DCDC/LDO requested
119 #define WM8350_LS_ENA 0x8000
120 #define WM8350_LDO4_ENA 0x0800
121 #define WM8350_LDO3_ENA 0x0400
122 #define WM8350_LDO2_ENA 0x0200
123 #define WM8350_LDO1_ENA 0x0100
124 #define WM8350_DC6_ENA 0x0020
125 #define WM8350_DC5_ENA 0x0010
126 #define WM8350_DC4_ENA 0x0008
127 #define WM8350_DC3_ENA 0x0004
128 #define WM8350_DC2_ENA 0x0002
129 #define WM8350_DC1_ENA 0x0001
132 * R177 (0xB1) - DCDC Active options
134 #define WM8350_PUTO_MASK 0x3000
135 #define WM8350_PWRUP_DELAY_MASK 0x0300
136 #define WM8350_DC6_ACTIVE 0x0020
137 #define WM8350_DC4_ACTIVE 0x0008
138 #define WM8350_DC3_ACTIVE 0x0004
139 #define WM8350_DC1_ACTIVE 0x0001
142 * R178 (0xB2) - DCDC Sleep options
144 #define WM8350_DC6_SLEEP 0x0020
145 #define WM8350_DC4_SLEEP 0x0008
146 #define WM8350_DC3_SLEEP 0x0004
147 #define WM8350_DC1_SLEEP 0x0001
150 * R179 (0xB3) - Power-check comparator
152 #define WM8350_PCCMP_ERRACT 0x4000
153 #define WM8350_PCCMP_RAIL 0x0100
154 #define WM8350_PCCMP_OFF_THR_MASK 0x0070
155 #define WM8350_PCCMP_ON_THR_MASK 0x0007
158 * R180 (0xB4) - DCDC1 Control
160 #define WM8350_DC1_OPFLT 0x0400
161 #define WM8350_DC1_VSEL_MASK 0x007F
162 #define WM8350_DC1_VSEL_SHIFT 0
165 * R181 (0xB5) - DCDC1 Timeouts
167 #define WM8350_DC1_ERRACT_MASK 0xC000
169 #define WM8350_DC1_ENSLOT_MASK 0x3C00
171 #define WM8350_DC1_SDSLOT_MASK 0x03C0
172 #define WM8350_DC1_UVTO_MASK 0x0030
175 /* Bit values for R181 (0xB5) */
176 #define WM8350_DC1_ERRACT_NONE 0
181 * R182 (0xB6) - DCDC1 Low Power
183 #define WM8350_DC1_HIB_MODE_MASK 0x7000
184 #define WM8350_DC1_HIB_TRIG_MASK 0x0300
185 #define WM8350_DC1_VIMG_MASK 0x007F
188 * R183 (0xB7) - DCDC2 Control
190 #define WM8350_DC2_MODE 0x4000
191 #define WM8350_DC2_MODE_MASK 0x4000
193 #define WM8350_DC2_HIB_MODE 0x1000
194 #define WM8350_DC2_HIB_MODE_MASK 0x1000
196 #define WM8350_DC2_HIB_TRIG_MASK 0x0300
198 #define WM8350_DC2_ILIM 0x0040
199 #define WM8350_DC2_ILIM_MASK 0x0040
201 #define WM8350_DC2_RMP_MASK 0x0018
203 #define WM8350_DC2_FBSRC_MASK 0x0003
204 #define WM8350_DC2_FBSRC_SHIFT 0
206 /* Bit values for R183 (0xB7) */
207 #define WM8350_DC2_MODE_BOOST 0
211 #define WM8350_DC2_HIB_MODE_DISABLE 0
213 #define WM8350_DC2_HIB_TRIG_NONE 0
218 #define WM8350_DC2_ILIM_HIGH 0
221 #define WM8350_DC2_RMP_30V 0
226 #define WM8350_DC2_FBSRC_FB2 0
232 * R184 (0xB8) - DCDC2 Timeouts
234 #define WM8350_DC2_ERRACT_MASK 0xC000
236 #define WM8350_DC2_ENSLOT_MASK 0x3C00
238 #define WM8350_DC2_SDSLOT_MASK 0x03C0
239 #define WM8350_DC2_UVTO_MASK 0x0030
241 /* Bit values for R184 (0xB8) */
242 #define WM8350_DC2_ERRACT_NONE 0
247 * R186 (0xBA) - DCDC3 Control
249 #define WM8350_DC3_OPFLT 0x0400
250 #define WM8350_DC3_VSEL_MASK 0x007F
251 #define WM8350_DC3_VSEL_SHIFT 0
254 * R187 (0xBB) - DCDC3 Timeouts
256 #define WM8350_DC3_ERRACT_MASK 0xC000
258 #define WM8350_DC3_ENSLOT_MASK 0x3C00
260 #define WM8350_DC3_SDSLOT_MASK 0x03C0
261 #define WM8350_DC3_UVTO_MASK 0x0030
264 /* Bit values for R187 (0xBB) */
265 #define WM8350_DC3_ERRACT_NONE 0
269 * R188 (0xBC) - DCDC3 Low Power
271 #define WM8350_DC3_HIB_MODE_MASK 0x7000
272 #define WM8350_DC3_HIB_TRIG_MASK 0x0300
273 #define WM8350_DC3_VIMG_MASK 0x007F
276 * R189 (0xBD) - DCDC4 Control
278 #define WM8350_DC4_OPFLT 0x0400
279 #define WM8350_DC4_VSEL_MASK 0x007F
280 #define WM8350_DC4_VSEL_SHIFT 0
283 * R190 (0xBE) - DCDC4 Timeouts
285 #define WM8350_DC4_ERRACT_MASK 0xC000
287 #define WM8350_DC4_ENSLOT_MASK 0x3C00
289 #define WM8350_DC4_SDSLOT_MASK 0x03C0
290 #define WM8350_DC4_UVTO_MASK 0x0030
293 /* Bit values for R190 (0xBE) */
294 #define WM8350_DC4_ERRACT_NONE 0
299 * R191 (0xBF) - DCDC4 Low Power
301 #define WM8350_DC4_HIB_MODE_MASK 0x7000
302 #define WM8350_DC4_HIB_TRIG_MASK 0x0300
303 #define WM8350_DC4_VIMG_MASK 0x007F
306 * R192 (0xC0) - DCDC5 Control
308 #define WM8350_DC5_MODE 0x4000
309 #define WM8350_DC5_MODE_MASK 0x4000
311 #define WM8350_DC5_HIB_MODE 0x1000
312 #define WM8350_DC5_HIB_MODE_MASK 0x1000
314 #define WM8350_DC5_HIB_TRIG_MASK 0x0300
316 #define WM8350_DC5_ILIM 0x0040
317 #define WM8350_DC5_ILIM_MASK 0x0040
319 #define WM8350_DC5_RMP_MASK 0x0018
321 #define WM8350_DC5_FBSRC_MASK 0x0003
322 #define WM8350_DC5_FBSRC_SHIFT 0
324 /* Bit values for R192 (0xC0) */
325 #define WM8350_DC5_MODE_BOOST 0
329 #define WM8350_DC5_HIB_MODE_DISABLE 0
331 #define WM8350_DC5_HIB_TRIG_NONE 0
336 #define WM8350_DC5_ILIM_HIGH 0
339 #define WM8350_DC5_RMP_30V 0
344 #define WM8350_DC5_FBSRC_FB2 0
350 * R193 (0xC1) - DCDC5 Timeouts
352 #define WM8350_DC5_ERRACT_MASK 0xC000
354 #define WM8350_DC5_ENSLOT_MASK 0x3C00
356 #define WM8350_DC5_SDSLOT_MASK 0x03C0
357 #define WM8350_DC5_UVTO_MASK 0x0030
360 /* Bit values for R193 (0xC1) */
361 #define WM8350_DC5_ERRACT_NONE 0
366 * R195 (0xC3) - DCDC6 Control
368 #define WM8350_DC6_OPFLT 0x0400
369 #define WM8350_DC6_VSEL_MASK 0x007F
370 #define WM8350_DC6_VSEL_SHIFT 0
373 * R196 (0xC4) - DCDC6 Timeouts
375 #define WM8350_DC6_ERRACT_MASK 0xC000
377 #define WM8350_DC6_ENSLOT_MASK 0x3C00
379 #define WM8350_DC6_SDSLOT_MASK 0x03C0
380 #define WM8350_DC6_UVTO_MASK 0x0030
383 /* Bit values for R196 (0xC4) */
384 #define WM8350_DC6_ERRACT_NONE 0
389 * R197 (0xC5) - DCDC6 Low Power
391 #define WM8350_DC6_HIB_MODE_MASK 0x7000
392 #define WM8350_DC6_HIB_TRIG_MASK 0x0300
393 #define WM8350_DC6_VIMG_MASK 0x007F
396 * R199 (0xC7) - Limit Switch Control
398 #define WM8350_LS_ERRACT_MASK 0xC000
400 #define WM8350_LS_ENSLOT_MASK 0x3C00
402 #define WM8350_LS_SDSLOT_MASK 0x03C0
404 #define WM8350_LS_HIB_MODE 0x0010
405 #define WM8350_LS_HIB_MODE_MASK 0x0010
407 #define WM8350_LS_HIB_PROT 0x0002
408 #define WM8350_LS_HIB_PROT_MASK 0x0002
410 #define WM8350_LS_PROT 0x0001
411 #define WM8350_LS_PROT_MASK 0x0001
412 #define WM8350_LS_PROT_SHIFT 0
414 /* Bit values for R199 (0xC7) */
415 #define WM8350_LS_ERRACT_NONE 0
420 * R200 (0xC8) - LDO1 Control
422 #define WM8350_LDO1_SWI 0x4000
423 #define WM8350_LDO1_OPFLT 0x0400
424 #define WM8350_LDO1_VSEL_MASK 0x001F
425 #define WM8350_LDO1_VSEL_SHIFT 0
428 * R201 (0xC9) - LDO1 Timeouts
430 #define WM8350_LDO1_ERRACT_MASK 0xC000
432 #define WM8350_LDO1_ENSLOT_MASK 0x3C00
434 #define WM8350_LDO1_SDSLOT_MASK 0x03C0
435 #define WM8350_LDO1_UVTO_MASK 0x0030
438 /* Bit values for R201 (0xC9) */
439 #define WM8350_LDO1_ERRACT_NONE 0
444 * R202 (0xCA) - LDO1 Low Power
446 #define WM8350_LDO1_HIB_MODE_MASK 0x3000
447 #define WM8350_LDO1_HIB_TRIG_MASK 0x0300
448 #define WM8350_LDO1_VIMG_MASK 0x001F
449 #define WM8350_LDO1_HIB_MODE_DIS (0x1 << 12)
453 * R203 (0xCB) - LDO2 Control
455 #define WM8350_LDO2_SWI 0x4000
456 #define WM8350_LDO2_OPFLT 0x0400
457 #define WM8350_LDO2_VSEL_MASK 0x001F
458 #define WM8350_LDO2_VSEL_SHIFT 0
461 * R204 (0xCC) - LDO2 Timeouts
463 #define WM8350_LDO2_ERRACT_MASK 0xC000
465 #define WM8350_LDO2_ENSLOT_MASK 0x3C00
467 #define WM8350_LDO2_SDSLOT_MASK 0x03C0
470 /* Bit values for R204 (0xCC) */
471 #define WM8350_LDO2_ERRACT_NONE 0
476 * R205 (0xCD) - LDO2 Low Power
478 #define WM8350_LDO2_HIB_MODE_MASK 0x3000
479 #define WM8350_LDO2_HIB_TRIG_MASK 0x0300
480 #define WM8350_LDO2_VIMG_MASK 0x001F
483 * R206 (0xCE) - LDO3 Control
485 #define WM8350_LDO3_SWI 0x4000
486 #define WM8350_LDO3_OPFLT 0x0400
487 #define WM8350_LDO3_VSEL_MASK 0x001F
488 #define WM8350_LDO3_VSEL_SHIFT 0
491 * R207 (0xCF) - LDO3 Timeouts
493 #define WM8350_LDO3_ERRACT_MASK 0xC000
495 #define WM8350_LDO3_ENSLOT_MASK 0x3C00
497 #define WM8350_LDO3_SDSLOT_MASK 0x03C0
498 #define WM8350_LDO3_UVTO_MASK 0x0030
501 /* Bit values for R207 (0xCF) */
502 #define WM8350_LDO3_ERRACT_NONE 0
507 * R208 (0xD0) - LDO3 Low Power
509 #define WM8350_LDO3_HIB_MODE_MASK 0x3000
510 #define WM8350_LDO3_HIB_TRIG_MASK 0x0300
511 #define WM8350_LDO3_VIMG_MASK 0x001F
514 * R209 (0xD1) - LDO4 Control
516 #define WM8350_LDO4_SWI 0x4000
517 #define WM8350_LDO4_OPFLT 0x0400
518 #define WM8350_LDO4_VSEL_MASK 0x001F
519 #define WM8350_LDO4_VSEL_SHIFT 0
522 * R210 (0xD2) - LDO4 Timeouts
524 #define WM8350_LDO4_ERRACT_MASK 0xC000
526 #define WM8350_LDO4_ENSLOT_MASK 0x3C00
528 #define WM8350_LDO4_SDSLOT_MASK 0x03C0
529 #define WM8350_LDO4_UVTO_MASK 0x0030
532 /* Bit values for R210 (0xD2) */
533 #define WM8350_LDO4_ERRACT_NONE 0
538 * R211 (0xD3) - LDO4 Low Power
540 #define WM8350_LDO4_HIB_MODE_MASK 0x3000
541 #define WM8350_LDO4_HIB_TRIG_MASK 0x0300
542 #define WM8350_LDO4_VIMG_MASK 0x001F
545 * R215 (0xD7) - VCC_FAULT Masks
547 #define WM8350_LS_FAULT 0x8000
548 #define WM8350_LDO4_FAULT 0x0800
549 #define WM8350_LDO3_FAULT 0x0400
550 #define WM8350_LDO2_FAULT 0x0200
551 #define WM8350_LDO1_FAULT 0x0100
552 #define WM8350_DC6_FAULT 0x0020
553 #define WM8350_DC5_FAULT 0x0010
554 #define WM8350_DC4_FAULT 0x0008
555 #define WM8350_DC3_FAULT 0x0004
556 #define WM8350_DC2_FAULT 0x0002
557 #define WM8350_DC1_FAULT 0x0001
560 * R216 (0xD8) - Main Bandgap Control
562 #define WM8350_MBG_LOAD_FUSES 0x8000
563 #define WM8350_MBG_FUSE_WPREP 0x4000
564 #define WM8350_MBG_FUSE_WRITE 0x2000
565 #define WM8350_MBG_FUSE_TRIM_MASK 0x1F00
566 #define WM8350_MBG_TRIM_SRC 0x0020
567 #define WM8350_MBG_USER_TRIM_MASK 0x001F
570 * R217 (0xD9) - OSC Control
572 #define WM8350_OSC_LOAD_FUSES 0x8000
573 #define WM8350_OSC_FUSE_WPREP 0x4000
574 #define WM8350_OSC_FUSE_WRITE 0x2000
575 #define WM8350_OSC_FUSE_TRIM_MASK 0x0F00
576 #define WM8350_OSC_TRIM_SRC 0x0020
577 #define WM8350_OSC_USER_TRIM_MASK 0x000F
580 * R248 (0xF8) - DCDC1 Force PWM
582 #define WM8350_DCDC1_FORCE_PWM_ENA 0x0010
585 * R250 (0xFA) - DCDC3 Force PWM
587 #define WM8350_DCDC3_FORCE_PWM_ENA 0x0010
590 * R251 (0xFB) - DCDC4 Force PWM
592 #define WM8350_DCDC4_FORCE_PWM_ENA 0x0010
595 * R253 (0xFD) - DCDC1 Force PWM
597 #define WM8350_DCDC6_FORCE_PWM_ENA 0x0010
602 #define WM8350_DCDC_1 0
610 #define WM8350_DCDC_ACTIVE_STANDBY 0
612 #define WM8350_DCDC_SLEEP_NORMAL 0
616 #define WM8350_DCDC_HIB_MODE_CUR (0 << 12)
625 #define WM8350_DCDC_HIB_SIG_REG (0 << 8)
631 #define WM8350_LDO_HIB_MODE_IMAGE (0 << 0)
632 #define WM8350_LDO_HIB_MODE_DIS (1 << 0)
635 #define WM8350_LDO_HIB_SIG_REG (0 << 8)
654 #define WM8350_ISINK_MODE_BOOST 0
656 #define WM8350_ISINK_ILIM_NORMAL 0
659 #define WM8350_ISINK_FLASH_DISABLE 0
661 #define WM8350_ISINK_FLASH_TRIG_BIT 0
664 #define WM8350_ISINK_FLASH_MODE_DIS (0 << 13)
665 #define WM8350_ISINK_FLASH_DUR_32MS (0 << 8)
669 #define WM8350_ISINK_FLASH_ON_INSTANT (0 << 0)
670 #define WM8350_ISINK_FLASH_ON_0_25S (1 << 0)
671 #define WM8350_ISINK_FLASH_ON_0_50S (2 << 0)
672 #define WM8350_ISINK_FLASH_ON_1_00S (3 << 0)
673 #define WM8350_ISINK_FLASH_ON_1_95S (1 << 0)
674 #define WM8350_ISINK_FLASH_ON_3_91S (2 << 0)
675 #define WM8350_ISINK_FLASH_ON_7_80S (3 << 0)
676 #define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 4)