Lines Matching full:enum
33 enum ssp_loopback {
39 * enum ssp_interface - interfaces allowed for this SSP Controller
48 enum ssp_interface {
56 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
58 enum ssp_hierarchy {
64 * enum ssp_clock_params - clock parameters, to set SSP clock at a
73 * enum ssp_rx_endian - endianess of Rx FIFO Data
76 enum ssp_rx_endian {
82 * enum ssp_tx_endian - endianess of Tx FIFO Data
84 enum ssp_tx_endian {
90 * enum ssp_data_size - number of bits in one data element
92 enum ssp_data_size {
106 * enum ssp_mode - SSP mode of operation (Communication modes)
108 enum ssp_mode {
115 * enum ssp_rx_level_trig - receive FIFO watermark level which triggers
118 enum ssp_rx_level_trig {
130 enum ssp_tx_level_trig {
139 * enum SPI Clock Phase - clock phase (Motorola SPI interface only)
143 enum ssp_spi_clk_phase {
149 * enum SPI Clock Polarity - clock polarity (Motorola SPI interface only)
153 enum ssp_spi_clk_pol {
161 enum ssp_microwire_ctrl_len {
175 * enum Microwire Wait State
179 enum ssp_microwire_wait_state {
185 * enum ssp_duplex - whether Full/Half Duplex on microwire, only
192 enum ssp_duplex {
198 * enum ssp_clkdelay - an optional clock delay on the feedback clock
211 enum ssp_clkdelay {
225 enum ssp_chip_select {
283 enum ssp_interface iface;
284 enum ssp_hierarchy hierarchy;
287 enum ssp_mode com_mode;
288 enum ssp_rx_level_trig rx_lev_trig;
289 enum ssp_tx_level_trig tx_lev_trig;
290 enum ssp_microwire_ctrl_len ctrl_len;
291 enum ssp_microwire_wait_state wait_state;
292 enum ssp_duplex duplex;
293 enum ssp_clkdelay clkdelay;