Lines Matching full:enum

100 enum dss_io_pad_mode {
106 enum dss_hdmi_venc_clk_source_select {
111 enum dss_dsi_content_type {
204 		enum omap_color_mode mode);
205 void default_get_overlay_fifo_thresholds(enum omap_plane plane,
236 void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
237 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
238 const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
250 void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
252 		enum omap_dss_clk_source clk_src);
253 void dss_select_lcd_clk_source(enum omap_channel channel,
254 		enum omap_dss_clk_source clk_src);
255 enum omap_dss_clk_source dss_get_dispc_clk_source(void);
256 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
257 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
259 void dss_set_venc_output(enum omap_dss_venc_type type);
305 u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
316 void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
337 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)  in dsi_get_pixel_size()
421 void dispc_set_loadmode(enum omap_dss_load_mode mode);
431 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
432 u32 dispc_ovl_get_fifo_size(enum omap_plane plane);
433 u32 dispc_ovl_get_burst_size(enum omap_plane plane);
434 int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
436 int dispc_ovl_enable(enum omap_plane plane, bool enable);
437 void dispc_ovl_set_channel_out(enum omap_plane plane,
438 		enum omap_channel channel);
440 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
441 void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
442 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
443 u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
444 bool dispc_mgr_go_busy(enum omap_channel channel);
445 void dispc_mgr_go(enum omap_channel channel);
446 bool dispc_mgr_is_enabled(enum omap_channel channel);
447 void dispc_mgr_enable(enum omap_channel channel, bool enable);
448 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
449 void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
450 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
451 void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
452 void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
453 		enum omap_lcd_display_type type);
454 void dispc_mgr_set_lcd_timings(enum omap_channel channel,
456 void dispc_mgr_set_pol_freq(enum omap_channel channel,
457 		enum omap_panel_config config, u8 acbi, u8 acb);
458 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
459 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
460 int dispc_mgr_set_clock_div(enum omap_channel channel,
462 int dispc_mgr_get_clock_div(enum omap_channel channel,
464 void dispc_mgr_setup(enum omap_channel channel,