Lines Matching +full:simple +full:- +full:framebuffer
2 * linux/drivers/video/aty128fb.c -- Frame buffer device for ATI Rage128
4 * Copyright (C) 1999-2003, Brad Douglas <brad@neruo.com>
8 * - Code cleanup
11 * - 15/16 bit cleanup
12 * - fix panning
15 * - pmac-specific PM stuff
16 * - various fixes & cleanups
19 * - FB_ACTIVATE fixes
22 * - Convert to new framebuffer API,
26 * - PCI hotplug
29 * - PCI ID update
30 * - replace ROM BIOS search
35 * - monitor sensing (DDC)
36 * - virtual display
37 * - other platform support (only ppc/x86 supported)
38 * - hardware cursor support
45 * example code and hardware. Thanks Nitya. -atong and brad
71 #include <asm/pci-bridge.h>
101 /* 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock) */
104 0, 0, -1, -1, 0, 39722, 48, 16, 33, 10, 96, 2,
109 /* default to 1024x768 at 75Hz on PPC - this will work
112 /* 1024x768, 75 Hz, Non-Interlaced (78.75 MHz dotclock) */
115 0, 0, -1, -1, 0, 12699, 160, 32, 28, 1, 96, 3,
122 /* 640x480, 60 Hz, Non-Interlaced (25.172 MHz dotclock) */
327 { 4, 4, 3, 3, 1, 3, 1, 16, 30, 16, "128-bit SDR SGRAM (1:1)" };
329 { 4, 8, 3, 3, 1, 3, 1, 17, 46, 17, "64-bit SDR SGRAM (1:1)" };
331 { 4, 4, 1, 2, 1, 2, 1, 16, 24, 16, "64-bit SDR SGRAM (2:1)" };
333 { 4, 4, 3, 3, 2, 3, 1, 16, 31, 16, "64-bit DDR SGRAM" };
493 * - endian conversions may possibly be avoided by
499 return readl (par->regbase + regindex); in _aty_ld_le32()
505 writel (val, par->regbase + regindex); in _aty_st_le32()
511 return readb (par->regbase + regindex); in _aty_ld_8()
517 writeb (val, par->regbase + regindex); in _aty_st_8()
612 par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff; in do_wait_for_fifo()
613 if (par->fifo_slots >= entries) in do_wait_for_fifo()
631 par->blitter_may_be_busy = 0; in wait_for_idle()
642 if (par->fifo_slots < entries) in wait_for_fifo()
644 par->fifo_slots -= entries; in wait_for_fifo()
704 pitch_value = par->crtc.pitch; in aty128_init_engine()
705 if (par->crtc.bpp == 24) { in aty128_init_engine()
726 (depth_to_dst(par->crtc.depth) << 8) | in aty128_init_engine()
773 return -EINVAL; in depth_to_dst()
804 /* Very simple test to make sure it appeared */ in aty128_map_ROM()
820 * relative start of ROM, but so far, I never found a dual-image ATI card in aty128_map_ROM()
852 printk(KERN_INFO "aty128fb: Found HP PA-RISC ROM Image\n"); in aty128_map_ROM()
874 par->constants.ppll_max = BIOS_IN32(bios_pll + 0x16); in aty128_get_pllinfo()
875 par->constants.ppll_min = BIOS_IN32(bios_pll + 0x12); in aty128_get_pllinfo()
876 par->constants.xclk = BIOS_IN16(bios_pll + 0x08); in aty128_get_pllinfo()
877 par->constants.ref_divider = BIOS_IN16(bios_pll + 0x10); in aty128_get_pllinfo()
878 par->constants.ref_clk = BIOS_IN16(bios_pll + 0x0e); in aty128_get_pllinfo()
881 par->constants.ppll_max, par->constants.ppll_min, in aty128_get_pllinfo()
882 par->constants.xclk, par->constants.ref_divider, in aty128_get_pllinfo()
883 par->constants.ref_clk); in aty128_get_pllinfo()
926 if (!par->constants.ref_clk) in aty128_timings()
927 par->constants.ref_clk = 2950; in aty128_timings()
935 par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), in aty128_timings()
938 par->constants.ref_divider = in aty128_timings()
942 if (!par->constants.ref_divider) { in aty128_timings()
943 par->constants.ref_divider = 0x3b; in aty128_timings()
948 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider); in aty128_timings()
952 if (!par->constants.ppll_min) in aty128_timings()
953 par->constants.ppll_min = 12500; in aty128_timings()
954 if (!par->constants.ppll_max) in aty128_timings()
955 par->constants.ppll_max = 25000; /* 23000 on some cards? */ in aty128_timings()
956 if (!par->constants.xclk) in aty128_timings()
957 par->constants.xclk = 0x1d4d; /* same as mclk */ in aty128_timings()
959 par->constants.fifo_width = 128; in aty128_timings()
960 par->constants.fifo_depth = 32; in aty128_timings()
964 par->mem = &sdr_128; in aty128_timings()
967 par->mem = &sdr_sgram; in aty128_timings()
970 par->mem = &ddr_sgram; in aty128_timings()
973 par->mem = &sdr_sgram; in aty128_timings()
987 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl); in aty128_set_crtc()
988 aty_st_le32(CRTC_H_TOTAL_DISP, crtc->h_total); in aty128_set_crtc()
989 aty_st_le32(CRTC_H_SYNC_STRT_WID, crtc->h_sync_strt_wid); in aty128_set_crtc()
990 aty_st_le32(CRTC_V_TOTAL_DISP, crtc->v_total); in aty128_set_crtc()
991 aty_st_le32(CRTC_V_SYNC_STRT_WID, crtc->v_sync_strt_wid); in aty128_set_crtc()
992 aty_st_le32(CRTC_PITCH, crtc->pitch); in aty128_set_crtc()
993 aty_st_le32(CRTC_OFFSET, crtc->offset); in aty128_set_crtc()
994 aty_st_le32(CRTC_OFFSET_CNTL, crtc->offset_cntl); in aty128_set_crtc()
1012 xres = var->xres; in aty128_var_to_crtc()
1013 yres = var->yres; in aty128_var_to_crtc()
1014 vxres = var->xres_virtual; in aty128_var_to_crtc()
1015 vyres = var->yres_virtual; in aty128_var_to_crtc()
1016 xoffset = var->xoffset; in aty128_var_to_crtc()
1017 yoffset = var->yoffset; in aty128_var_to_crtc()
1018 bpp = var->bits_per_pixel; in aty128_var_to_crtc()
1019 left = var->left_margin; in aty128_var_to_crtc()
1020 right = var->right_margin; in aty128_var_to_crtc()
1021 upper = var->upper_margin; in aty128_var_to_crtc()
1022 lower = var->lower_margin; in aty128_var_to_crtc()
1023 hslen = var->hsync_len; in aty128_var_to_crtc()
1024 vslen = var->vsync_len; in aty128_var_to_crtc()
1025 sync = var->sync; in aty128_var_to_crtc()
1026 vmode = var->vmode; in aty128_var_to_crtc()
1031 depth = (var->green.length == 6) ? 16 : 15; in aty128_var_to_crtc()
1036 return -EINVAL; in aty128_var_to_crtc()
1051 if (dst == -EINVAL) { in aty128_var_to_crtc()
1053 return -EINVAL; in aty128_var_to_crtc()
1060 if ((u32)(vxres * vyres * bytpp) > par->vram_size) { in aty128_var_to_crtc()
1062 return -EINVAL; in aty128_var_to_crtc()
1065 h_disp = (xres >> 3) - 1; in aty128_var_to_crtc()
1066 h_total = (((xres + right + hslen + left) >> 3) - 1) & 0xFFFFL; in aty128_var_to_crtc()
1068 v_disp = yres - 1; in aty128_var_to_crtc()
1069 v_total = (yres + upper + vslen + lower - 1) & 0xFFFFL; in aty128_var_to_crtc()
1072 if (((h_total >> 3) - 1) > 0x1ff || (v_total - 1) > 0x7FF) { in aty128_var_to_crtc()
1074 return -EINVAL; in aty128_var_to_crtc()
1098 crtc->gen_cntl = 0x3000000L | c_sync | (dst << 8); in aty128_var_to_crtc()
1100 crtc->h_total = h_total | (h_disp << 16); in aty128_var_to_crtc()
1101 crtc->v_total = v_total | (v_disp << 16); in aty128_var_to_crtc()
1103 crtc->h_sync_strt_wid = h_sync_strt | (h_sync_wid << 16) | in aty128_var_to_crtc()
1105 crtc->v_sync_strt_wid = v_sync_strt | (v_sync_wid << 16) | in aty128_var_to_crtc()
1108 crtc->pitch = vxres >> 3; in aty128_var_to_crtc()
1110 crtc->offset = 0; in aty128_var_to_crtc()
1112 if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) in aty128_var_to_crtc()
1113 crtc->offset_cntl = 0x00010000; in aty128_var_to_crtc()
1115 crtc->offset_cntl = 0; in aty128_var_to_crtc()
1117 crtc->vxres = vxres; in aty128_var_to_crtc()
1118 crtc->vyres = vyres; in aty128_var_to_crtc()
1119 crtc->xoffset = xoffset; in aty128_var_to_crtc()
1120 crtc->yoffset = yoffset; in aty128_var_to_crtc()
1121 crtc->depth = depth; in aty128_var_to_crtc()
1122 crtc->bpp = bpp; in aty128_var_to_crtc()
1132 var->red.msb_right = 0; in aty128_pix_width_to_var()
1133 var->green.msb_right = 0; in aty128_pix_width_to_var()
1134 var->blue.offset = 0; in aty128_pix_width_to_var()
1135 var->blue.msb_right = 0; in aty128_pix_width_to_var()
1136 var->transp.offset = 0; in aty128_pix_width_to_var()
1137 var->transp.length = 0; in aty128_pix_width_to_var()
1138 var->transp.msb_right = 0; in aty128_pix_width_to_var()
1141 var->bits_per_pixel = 8; in aty128_pix_width_to_var()
1142 var->red.offset = 0; in aty128_pix_width_to_var()
1143 var->red.length = 8; in aty128_pix_width_to_var()
1144 var->green.offset = 0; in aty128_pix_width_to_var()
1145 var->green.length = 8; in aty128_pix_width_to_var()
1146 var->blue.length = 8; in aty128_pix_width_to_var()
1149 var->bits_per_pixel = 16; in aty128_pix_width_to_var()
1150 var->red.offset = 10; in aty128_pix_width_to_var()
1151 var->red.length = 5; in aty128_pix_width_to_var()
1152 var->green.offset = 5; in aty128_pix_width_to_var()
1153 var->green.length = 5; in aty128_pix_width_to_var()
1154 var->blue.length = 5; in aty128_pix_width_to_var()
1157 var->bits_per_pixel = 16; in aty128_pix_width_to_var()
1158 var->red.offset = 11; in aty128_pix_width_to_var()
1159 var->red.length = 5; in aty128_pix_width_to_var()
1160 var->green.offset = 5; in aty128_pix_width_to_var()
1161 var->green.length = 6; in aty128_pix_width_to_var()
1162 var->blue.length = 5; in aty128_pix_width_to_var()
1165 var->bits_per_pixel = 24; in aty128_pix_width_to_var()
1166 var->red.offset = 16; in aty128_pix_width_to_var()
1167 var->red.length = 8; in aty128_pix_width_to_var()
1168 var->green.offset = 8; in aty128_pix_width_to_var()
1169 var->green.length = 8; in aty128_pix_width_to_var()
1170 var->blue.length = 8; in aty128_pix_width_to_var()
1173 var->bits_per_pixel = 32; in aty128_pix_width_to_var()
1174 var->red.offset = 16; in aty128_pix_width_to_var()
1175 var->red.length = 8; in aty128_pix_width_to_var()
1176 var->green.offset = 8; in aty128_pix_width_to_var()
1177 var->green.length = 8; in aty128_pix_width_to_var()
1178 var->blue.length = 8; in aty128_pix_width_to_var()
1179 var->transp.offset = 24; in aty128_pix_width_to_var()
1180 var->transp.length = 8; in aty128_pix_width_to_var()
1184 return -EINVAL; in aty128_pix_width_to_var()
1200 h_total = crtc->h_total & 0x1ff; in aty128_crtc_to_var()
1201 h_disp = (crtc->h_total >> 16) & 0xff; in aty128_crtc_to_var()
1202 h_sync_strt = (crtc->h_sync_strt_wid >> 3) & 0x1ff; in aty128_crtc_to_var()
1203 h_sync_dly = crtc->h_sync_strt_wid & 0x7; in aty128_crtc_to_var()
1204 h_sync_wid = (crtc->h_sync_strt_wid >> 16) & 0x3f; in aty128_crtc_to_var()
1205 h_sync_pol = (crtc->h_sync_strt_wid >> 23) & 0x1; in aty128_crtc_to_var()
1206 v_total = crtc->v_total & 0x7ff; in aty128_crtc_to_var()
1207 v_disp = (crtc->v_total >> 16) & 0x7ff; in aty128_crtc_to_var()
1208 v_sync_strt = crtc->v_sync_strt_wid & 0x7ff; in aty128_crtc_to_var()
1209 v_sync_wid = (crtc->v_sync_strt_wid >> 16) & 0x1f; in aty128_crtc_to_var()
1210 v_sync_pol = (crtc->v_sync_strt_wid >> 23) & 0x1; in aty128_crtc_to_var()
1211 c_sync = crtc->gen_cntl & CRTC_CSYNC_EN ? 1 : 0; in aty128_crtc_to_var()
1212 pix_width = crtc->gen_cntl & CRTC_PIX_WIDTH_MASK; in aty128_crtc_to_var()
1217 left = ((h_total - h_sync_strt - h_sync_wid) << 3) - h_sync_dly; in aty128_crtc_to_var()
1218 right = ((h_sync_strt - h_disp) << 3) + h_sync_dly; in aty128_crtc_to_var()
1220 upper = v_total - v_sync_strt - v_sync_wid; in aty128_crtc_to_var()
1221 lower = v_sync_strt - v_disp; in aty128_crtc_to_var()
1229 var->xres = xres; in aty128_crtc_to_var()
1230 var->yres = yres; in aty128_crtc_to_var()
1231 var->xres_virtual = crtc->vxres; in aty128_crtc_to_var()
1232 var->yres_virtual = crtc->vyres; in aty128_crtc_to_var()
1233 var->xoffset = crtc->xoffset; in aty128_crtc_to_var()
1234 var->yoffset = crtc->yoffset; in aty128_crtc_to_var()
1235 var->left_margin = left; in aty128_crtc_to_var()
1236 var->right_margin = right; in aty128_crtc_to_var()
1237 var->upper_margin = upper; in aty128_crtc_to_var()
1238 var->lower_margin = lower; in aty128_crtc_to_var()
1239 var->hsync_len = hslen; in aty128_crtc_to_var()
1240 var->vsync_len = vslen; in aty128_crtc_to_var()
1241 var->sync = sync; in aty128_crtc_to_var()
1242 var->vmode = FB_VMODE_NONINTERLACED; in aty128_crtc_to_var()
1260 struct fb_info *info = pci_get_drvdata(par->pdev); in aty128_set_lcd_enable()
1300 aty_st_pll(PPLL_REF_DIV, par->constants.ref_divider & 0x3ff); in aty128_set_pll()
1305 div3 |= pll->feedback_divider; in aty128_set_pll()
1307 div3 |= post_conv[pll->post_divider] << 16; in aty128_set_pll()
1326 const struct aty128_constants c = par->constants; in aty128_var_to_pll()
1345 pll->post_divider = post_dividers[i]; in aty128_var_to_pll()
1351 return -EINVAL; in aty128_var_to_pll()
1357 pll->feedback_divider = round_div(n, d); in aty128_var_to_pll()
1358 pll->vclk = vclk; in aty128_var_to_pll()
1361 "vclk_per: %d\n", pll->post_divider, in aty128_var_to_pll()
1362 pll->feedback_divider, vclk, output_freq, in aty128_var_to_pll()
1371 var->pixclock = 100000000 / pll->vclk; in aty128_pll_to_var()
1380 aty_st_le32(DDA_CONFIG, dsp->dda_config); in aty128_set_fifo()
1381 aty_st_le32(DDA_ON_OFF, dsp->dda_on_off); in aty128_set_fifo()
1390 const struct aty128_meminfo *m = par->mem; in aty128_ddafifo()
1391 u32 xclk = par->constants.xclk; in aty128_ddafifo()
1392 u32 fifo_width = par->constants.fifo_width; in aty128_ddafifo()
1393 u32 fifo_depth = par->constants.fifo_depth; in aty128_ddafifo()
1401 d = pll->vclk * bpp; in aty128_ddafifo()
1404 ron = 4 * m->MB + in aty128_ddafifo()
1405 3 * ((m->Trcd - 2 > 0) ? m->Trcd - 2 : 0) + in aty128_ddafifo()
1406 2 * m->Trp + in aty128_ddafifo()
1407 m->Twr + in aty128_ddafifo()
1408 m->CL + in aty128_ddafifo()
1409 m->Tr2w + in aty128_ddafifo()
1421 ron <<= (11 - p); in aty128_ddafifo()
1423 n <<= (11 - p); in aty128_ddafifo()
1425 roff = x * (fifo_depth - 4); in aty128_ddafifo()
1427 if ((ron + m->Rloop) >= roff) { in aty128_ddafifo()
1429 return -EINVAL; in aty128_ddafifo()
1433 p, m->Rloop, x, ron, roff); in aty128_ddafifo()
1435 dsp->dda_config = p << 16 | m->Rloop << 20 | x; in aty128_ddafifo()
1436 dsp->dda_on_off = ron << 16 | roff; in aty128_ddafifo()
1447 struct aty128fb_par *par = info->par; in aty128fb_set_par()
1451 if ((err = aty128_decode_var(&info->var, par)) != 0) in aty128fb_set_par()
1454 if (par->blitter_may_be_busy) in aty128fb_set_par()
1473 aty128_set_crtc(&par->crtc, par); in aty128fb_set_par()
1474 aty128_set_pll(&par->pll, par); in aty128fb_set_par()
1475 aty128_set_fifo(&par->fifo_reg, par); in aty128fb_set_par()
1480 if (par->crtc.bpp == 32) in aty128fb_set_par()
1482 else if (par->crtc.bpp == 16) in aty128fb_set_par()
1489 info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3; in aty128fb_set_par()
1490 info->fix.visual = par->crtc.bpp == 8 ? FB_VISUAL_PSEUDOCOLOR in aty128fb_set_par()
1493 if (par->chip_gen == rage_M3) { in aty128fb_set_par()
1494 aty128_set_crt_enable(par, par->crt_on); in aty128fb_set_par()
1495 aty128_set_lcd_enable(par, par->lcd_on); in aty128fb_set_par()
1497 if (par->accel_flags & FB_ACCELF_TEXT) in aty128fb_set_par()
1501 btext_update_display(info->fix.smem_start, in aty128fb_set_par()
1502 (((par->crtc.h_total>>16) & 0xff)+1)*8, in aty128fb_set_par()
1503 ((par->crtc.v_total>>16) & 0x7ff)+1, in aty128fb_set_par()
1504 par->crtc.bpp, in aty128fb_set_par()
1505 par->crtc.vxres*par->crtc.bpp/8); in aty128fb_set_par()
1525 if ((err = aty128_var_to_pll(var->pixclock, &pll, par))) in aty128_decode_var()
1531 par->crtc = crtc; in aty128_decode_var()
1532 par->pll = pll; in aty128_decode_var()
1533 par->fifo_reg = fifo_reg; in aty128_decode_var()
1534 par->accel_flags = var->accel_flags; in aty128_decode_var()
1545 if ((err = aty128_crtc_to_var(&par->crtc, var))) in aty128_encode_var()
1548 if ((err = aty128_pll_to_var(&par->pll, var))) in aty128_encode_var()
1551 var->nonstd = 0; in aty128_encode_var()
1552 var->activate = 0; in aty128_encode_var()
1554 var->height = -1; in aty128_encode_var()
1555 var->width = -1; in aty128_encode_var()
1556 var->accel_flags = par->accel_flags; in aty128_encode_var()
1567 par = *(struct aty128fb_par *)info->par; in aty128fb_check_var()
1580 struct aty128fb_par *par = fb->par; in aty128fb_pan_display()
1585 xres = (((par->crtc.h_total >> 16) & 0xff) + 1) << 3; in aty128fb_pan_display()
1586 yres = ((par->crtc.v_total >> 16) & 0x7ff) + 1; in aty128fb_pan_display()
1588 xoffset = (var->xoffset +7) & ~7; in aty128fb_pan_display()
1589 yoffset = var->yoffset; in aty128fb_pan_display()
1591 if (xoffset+xres > par->crtc.vxres || yoffset+yres > par->crtc.vyres) in aty128fb_pan_display()
1592 return -EINVAL; in aty128fb_pan_display()
1594 par->crtc.xoffset = xoffset; in aty128fb_pan_display()
1595 par->crtc.yoffset = yoffset; in aty128fb_pan_display()
1597 offset = ((yoffset * par->crtc.vxres + xoffset)*(par->crtc.bpp >> 3)) & ~7; in aty128fb_pan_display()
1599 if (par->crtc.bpp == 24) in aty128fb_pan_display()
1614 if (par->chip_gen == rage_M3) { in aty128_st_pal()
1636 struct aty128fb_par *par = info->par; in aty128fb_sync()
1638 if (par->blitter_may_be_busy) in aty128fb_sync()
1707 struct fb_info *info = pci_get_drvdata(par->pdev); in aty128_bl_get_level_brightness()
1712 atylevel = MAX_LEVEL - in aty128_bl_get_level_brightness()
1713 (info->bl_curve[level] * FB_BACKLIGHT_MAX / MAX_LEVEL); in aty128_bl_get_level_brightness()
1737 if (bd->props.power != FB_BLANK_UNBLANK || in aty128_bl_update_status()
1738 bd->props.fb_blank != FB_BLANK_UNBLANK || in aty128_bl_update_status()
1739 !par->lcd_on) in aty128_bl_update_status()
1742 level = bd->props.brightness; in aty128_bl_update_status()
1786 return bd->props.brightness; in aty128_bl_get_brightness()
1796 if (info->bl_dev) { in aty128_bl_set_power()
1797 info->bl_dev->props.power = power; in aty128_bl_set_power()
1798 backlight_update_status(info->bl_dev); in aty128_bl_set_power()
1805 struct fb_info *info = pci_get_drvdata(par->pdev); in aty128_bl_init()
1810 if (par->chip_gen != rage_M3) in aty128_bl_init()
1818 snprintf(name, sizeof(name), "aty128bl%d", info->node); in aty128_bl_init()
1822 props.max_brightness = FB_BACKLIGHT_LEVELS - 1; in aty128_bl_init()
1823 bd = backlight_device_register(name, info->dev, par, &aty128_bl_data, in aty128_bl_init()
1826 info->bl_dev = NULL; in aty128_bl_init()
1831 info->bl_dev = bd; in aty128_bl_init()
1836 bd->props.brightness = bd->props.max_brightness; in aty128_bl_init()
1837 bd->props.power = FB_BLANK_UNBLANK; in aty128_bl_init()
1866 pci_restore_state(par->pdev); in aty128_early_resume()
1867 aty128_do_resume(par->pdev); in aty128_early_resume()
1875 struct aty128fb_par *par = info->par; in aty128_init()
1885 video_card[8] = ent->device >> 8; in aty128_init()
1886 video_card[9] = ent->device & 0xFF; in aty128_init()
1889 if (ent->driver_data < ARRAY_SIZE(r128_family)) in aty128_init()
1890 strlcat(video_card, r128_family[ent->driver_data], sizeof(video_card)); in aty128_init()
1894 if (par->vram_size % (1024 * 1024) == 0) in aty128_init()
1895 printk("%dM %s\n", par->vram_size / (1024*1024), par->mem->name); in aty128_init()
1897 printk("%dk %s\n", par->vram_size / 1024, par->mem->name); in aty128_init()
1899 par->chip_gen = ent->driver_data; in aty128_init()
1902 info->fbops = &aty128fb_ops; in aty128_init()
1903 info->flags = FBINFO_FLAG_DEFAULT; in aty128_init()
1905 par->lcd_on = default_lcd_on; in aty128_init()
1906 par->crt_on = default_crt_on; in aty128_init()
1912 if (par->chip_gen == rage_M3) { in aty128_init()
1986 if (par->chip_gen == rage_M3) in aty128_init()
1993 info->var = var; in aty128_init()
1994 fb_alloc_cmap(&info->cmap, 256, 0); in aty128_init()
2000 par->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM); in aty128_init()
2001 par->pdev = pdev; in aty128_init()
2002 par->asleep = 0; in aty128_init()
2003 par->lock_blank = 0; in aty128_init()
2014 info->node, info->fix.id, video_card); in aty128_init()
2035 return -ENODEV; in aty128_probe()
2043 return -ENODEV; in aty128_probe()
2054 info = framebuffer_alloc(sizeof(struct aty128fb_par), &pdev->dev); in aty128_probe()
2059 par = info->par; in aty128_probe()
2061 info->pseudo_palette = par->pseudo_palette; in aty128_probe()
2064 info->fix.mmio_start = reg_addr; in aty128_probe()
2065 par->regbase = pci_ioremap_bar(pdev, 2); in aty128_probe()
2066 if (!par->regbase) in aty128_probe()
2071 par->vram_size = aty_ld_le32(CNFG_MEMSIZE) & 0x03FFFFFF; in aty128_probe()
2073 /* Virtualize the framebuffer */ in aty128_probe()
2074 info->screen_base = ioremap(fb_addr, par->vram_size); in aty128_probe()
2075 if (!info->screen_base) in aty128_probe()
2078 /* Set up info->fix */ in aty128_probe()
2079 info->fix = aty128fb_fix; in aty128_probe()
2080 info->fix.smem_start = fb_addr; in aty128_probe()
2081 info->fix.smem_len = par->vram_size; in aty128_probe()
2082 info->fix.mmio_start = reg_addr; in aty128_probe()
2113 par->mtrr.vram = mtrr_add(info->fix.smem_start, in aty128_probe()
2114 par->vram_size, MTRR_TYPE_WRCOMB, 1); in aty128_probe()
2115 par->mtrr.vram_valid = 1; in aty128_probe()
2123 iounmap(info->screen_base); in aty128_probe()
2125 iounmap(par->regbase); in aty128_probe()
2134 return -ENODEV; in aty128_probe()
2145 par = info->par; in aty128_remove()
2150 aty128_bl_exit(info->bl_dev); in aty128_remove()
2154 if (par->mtrr.vram_valid) in aty128_remove()
2155 mtrr_del(par->mtrr.vram, info->fix.smem_start, in aty128_remove()
2156 par->vram_size); in aty128_remove()
2158 iounmap(par->regbase); in aty128_remove()
2159 iounmap(info->screen_base); in aty128_remove()
2176 struct aty128fb_par *par = fb->par; in aty128fb_blank()
2179 if (par->lock_blank || par->asleep) in aty128fb_blank()
2202 if (par->chip_gen == rage_M3) { in aty128fb_blank()
2203 aty128_set_crt_enable(par, par->crt_on && !blank); in aty128fb_blank()
2204 aty128_set_lcd_enable(par, par->lcd_on && !blank); in aty128fb_blank()
2218 struct aty128fb_par *par = info->par; in aty128fb_setcolreg()
2221 || (par->crtc.depth == 16 && regno > 63) in aty128fb_setcolreg()
2222 || (par->crtc.depth == 15 && regno > 31)) in aty128fb_setcolreg()
2231 u32 *pal = info->pseudo_palette; in aty128fb_setcolreg()
2233 switch (par->crtc.depth) { in aty128fb_setcolreg()
2250 if (par->crtc.depth == 16 && regno > 0) { in aty128fb_setcolreg()
2252 * With the 5-6-5 split of bits for RGB at 16 bits/pixel, we in aty128fb_setcolreg()
2258 par->green[regno] = green; in aty128fb_setcolreg()
2260 par->red[regno] = red; in aty128fb_setcolreg()
2261 par->blue[regno] = blue; in aty128fb_setcolreg()
2262 aty128_st_pal(regno * 8, red, par->green[regno*2], in aty128fb_setcolreg()
2265 red = par->red[regno/2]; in aty128fb_setcolreg()
2266 blue = par->blue[regno/2]; in aty128fb_setcolreg()
2268 } else if (par->crtc.bpp == 16) in aty128fb_setcolreg()
2285 struct aty128fb_par *par = info->par; in aty128fb_ioctl()
2291 if (par->chip_gen != rage_M3) in aty128fb_ioctl()
2292 return -EINVAL; in aty128fb_ioctl()
2296 par->lcd_on = (value & 0x01) != 0; in aty128fb_ioctl()
2297 par->crt_on = (value & 0x02) != 0; in aty128fb_ioctl()
2298 if (!par->crt_on && !par->lcd_on) in aty128fb_ioctl()
2299 par->lcd_on = 1; in aty128fb_ioctl()
2300 aty128_set_crt_enable(par, par->crt_on); in aty128fb_ioctl()
2301 aty128_set_lcd_enable(par, par->lcd_on); in aty128fb_ioctl()
2304 if (par->chip_gen != rage_M3) in aty128fb_ioctl()
2305 return -EINVAL; in aty128fb_ioctl()
2306 value = (par->crt_on << 1) | par->lcd_on; in aty128fb_ioctl()
2309 return -EINVAL; in aty128fb_ioctl()
2326 dstval = depth_to_dst(par->current_par.crtc.depth);
2331 } else if (dstval == -EINVAL) {
2349 par->blitter_may_be_busy = 1;
2372 (struct fb_info_aty128 *)p->fb_info);
2379 struct pci_dev *pdev = par->pdev; in aty128_set_suspend()
2381 if (!par->pm_reg) in aty128_set_suspend()
2385 * D3 would require a complete re-initialisation of the chip, in aty128_set_suspend()
2415 struct aty128fb_par *par = info->par; in aty128_pci_suspend()
2437 if (state.event == pdev->dev.power.power_state.event) in aty128_pci_suspend()
2455 par->asleep = 1; in aty128_pci_suspend()
2456 par->lock_blank = 1; in aty128_pci_suspend()
2467 * framebuffer before we put the chip to suspend state. On 2.4, I in aty128_pci_suspend()
2476 pdev->dev.power.power_state = state; in aty128_pci_suspend()
2484 struct aty128fb_par *par = info->par; in aty128_do_resume()
2486 if (pdev->dev.power.power_state.event == PM_EVENT_ON) in aty128_do_resume()
2496 par->asleep = 0; in aty128_do_resume()
2502 fb_pan_display(info, &info->var); in aty128_do_resume()
2503 fb_set_cmap(&info->cmap, info); in aty128_do_resume()
2509 par->lock_blank = 0; in aty128_do_resume()
2520 pdev->dev.power.power_state = PMSG_ON; in aty128_do_resume()
2545 return -ENODEV; in aty128fb_init()
2561 MODULE_AUTHOR("(c)1999-2003 Brad Douglas <brad@neruo.com>");
2565 MODULE_PARM_DESC(mode_option, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");