167 	} else {  in musb_h_tx_start()
279 		} else {  in musb_start_urb()
295 		else if (is_cppi_enabled() || tusb_dma_omap())  in musb_start_urb()
334 	else  in musb_save_toggle()
342  * advancing to either the next URB queued to that qh, or else invalidating
381 		else  in musb_advance_schedule()
485 		} else  in musb_host_packet_rx()
494 	} else {  in musb_host_packet_rx()
503 		} else  in musb_host_packet_rx()
526 	else {  in musb_host_packet_rx()
566 		 * Clear the MODE bit (and everything else) to enable Rx.  in musb_rx_reinit()
574 	} else {  in musb_rx_reinit()
589 	} else  in musb_rx_reinit()
601 	else  in musb_rx_reinit()
629 	} else {  in musb_tx_dma_program()
636 #else  in musb_tx_dma_program()
706 			else  in musb_ep_program()
709 	} else  in musb_ep_program()
749 			else  in musb_ep_program()
757 		} else {  in musb_ep_program()
768 		} else  in musb_ep_program()
777 			else if (can_bulk_split(musb, qh->type))  in musb_ep_program()
781 			else  in musb_ep_program()
786 		} else {  in musb_ep_program()
796 		else  in musb_ep_program()
813 	} else {  in musb_ep_program()
823 			else  in musb_ep_program()
828 		} else {  in musb_ep_program()
864 			} else  in musb_ep_program()
904 		} else if (urb->actual_length <  in musb_h_ep0_continue()
914 		} else if (request->bRequestType & USB_DIR_IN) {  in musb_h_ep0_continue()
919 		} else {  in musb_h_ep0_continue()
991 	} else if (csr & MUSB_CSR0_H_ERROR) {  in musb_h_ep0_irq()
995 	} else if (csr & MUSB_CSR0_H_NAKTIMEOUT) {  in musb_h_ep0_irq()
1023 		} else {  in musb_h_ep0_irq()
1048 		} else {  in musb_h_ep0_irq()
1054 			else  in musb_h_ep0_irq()
1066 	} else  in musb_h_ep0_irq()
1132 	} else if (tx_csr & MUSB_TXCSR_H_ERROR) {  in musb_host_tx()
1138 	} else if (tx_csr & MUSB_TXCSR_H_NAKTIMEOUT) {  in musb_host_tx()
1252 		else  in musb_host_tx()
1264 			} else {  in musb_host_tx()
1269 		} else if (dma && urb->transfer_buffer_length == qh->offset) {  in musb_host_tx()
1271 		} else {  in musb_host_tx()
1275 			else if (qh->offset == urb->transfer_buffer_length  in musb_host_tx()
1302 	} else if ((usb_pipeisoc(pipe) || transfer_pending) && dma) {  in musb_host_tx()
1309 	} else	if (tx_csr & MUSB_TXCSR_DMAENAB) {  in musb_host_tx()
1346 	|			   |		else complete urb.
1471 	} else if (rx_csr & MUSB_RXCSR_H_ERROR) {  in musb_host_rx()
1477 	} else if (rx_csr & MUSB_RXCSR_DATAERROR) {  in musb_host_rx()
1502 		} else {  in musb_host_rx()
1507 	} else if (rx_csr & MUSB_RXCSR_INCOMPRX) {  in musb_host_rx()
1587 			else  in musb_host_rx()
1590 		} else  {  in musb_host_rx()
1608 #else  in musb_host_rx()
1611 	} else if (urb->status == -EINPROGRESS) {  in musb_host_rx()
1665 				} else  in musb_host_rx()
1669 			} else {  in musb_host_rx()
1689 			} else {  in musb_host_rx()
1716 			else  in musb_host_rx()
1789 	/* else, periodic transfers get muxed to other endpoints */  in musb_schedule()
1814 		else  in musb_schedule()
1849 		else  in musb_schedule()
1863 	} else if (best_end < 0) {  in musb_schedule()
2045 	} else  in musb_urb_enqueue()
2109 	} else if (ep->epnum) {  in musb_cleanup_urb()
2123 	} else  {  in musb_cleanup_urb()
2174 		/* If nothing else (usually musb_giveback) is using it  in musb_urb_dequeue()
2182 	} else  in musb_urb_dequeue()
2227 	} else {  in musb_h_disable()
2296 	} else  in musb_bus_suspend()