Lines Matching +full:pre +full:- +full:filled
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
26 /* first fields are hardware-specified */
48 struct ed *ed_prev; /* for non-interrupt EDs */
51 /* create --> IDLE --> OPER --> ... --> IDLE --> destroy
52 * usually: OPER --> UNLINK --> (IDLE | OPER) --> ...
80 /* first fields are hardware-specified */
115 * big-endian PPC hardware that's the second entry.
123 struct td *td_hash; /* dma-->td hashtable */
136 * Hardware transfer status codes -- CC from td->hwINFO or td->hwPSW
158 /* CRC Error */ -EILSEQ,
159 /* Bit Stuff */ -EPROTO,
160 /* Data Togg */ -EILSEQ,
161 /* Stall */ -EPIPE,
162 /* DevNotResp */ -ETIME,
163 /* PIDCheck */ -EPROTO,
164 /* UnExpPID */ -EPROTO,
165 /* DataOver */ -EOVERFLOW,
166 /* DataUnder */ -EREMOTEIO,
167 /* (for hw) */ -EIO,
168 /* (for hw) */ -EIO,
169 /* BufferOver */ -ECOMM,
170 /* BuffUnder */ -ENOSR,
171 /* (for HCD) */ -EALREADY,
172 /* (for HCD) */ -EALREADY
179 * told the base address of it. It must be 256-byte aligned.
255 /* pre-shifted values for HCFS */
265 #define OHCI_CLF (1 << 1) /* control list filled */
266 #define OHCI_BLF (1 << 2) /* bulk list filled */
325 /* hcd-private per-urb state */
357 * I/O memory used to communicate with the HC (dma-consistent)
362 * main memory used to communicate with the HC (dma-consistent).
377 * other external transceivers should be software-transparent
412 #define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */
434 return ohci->flags & OHCI_QUIRK_NEC; in quirk_nec()
438 return ohci->flags & OHCI_QUIRK_ZFMICRO; in quirk_zfmicro()
442 return ohci->flags & OHCI_QUIRK_AMD_PLL; in quirk_amdiso()
446 return ohci->flags & OHCI_QUIRK_AMD_PREFETCH; in quirk_amdprefetch()
470 return (struct ohci_hcd *) (hcd->hcd_priv); in hcd_to_ohci()
477 /*-------------------------------------------------------------------------*/
484 dev_dbg (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
486 dev_err (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
488 dev_info (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
490 dev_warn (ohci_to_hcd(ohci)->self.controller , fmt , ## args )
498 /*-------------------------------------------------------------------------*/
502 * in-memory communication descriptors in little-endian format,
508 * they have a different endianness for registers vs. in-memory
520 * --------------- ----------------------
529 * (If you have a mixed endian controller, you -must- also define
537 #define big_endian_desc(ohci) (ohci->flags & OHCI_QUIRK_BE_DESC)
547 #define big_endian_mmio(ohci) (ohci->flags & OHCI_QUIRK_BE_MMIO)
556 * Big-endian read/write functions are arch-specific.
588 /*-------------------------------------------------------------------------*/
648 /*-------------------------------------------------------------------------*/
652 * some big-endian SOC implementations. Same thing happens with PSW access.
656 #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
665 tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no); in ohci_frame_no()
669 tmp = le32_to_cpup((__force __le32 *)&ohci->hcca->frame_no); in ohci_frame_no()
678 &td->hwPSW[index ^ 1] : &td->hwPSW[index]); in ohci_hwPSWp()
687 /*-------------------------------------------------------------------------*/
689 #define FI 0x2edf /* 12000 bits per frame (-1) */
690 #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
696 u32 fi = ohci->fminterval & 0x03fff; in periodic_reinit()
697 u32 fit = ohci_readl(ohci, &ohci->regs->fminterval) & FIT; in periodic_reinit()
699 ohci_writel (ohci, (fit ^ FIT) | ohci->fminterval, in periodic_reinit()
700 &ohci->regs->fminterval); in periodic_reinit()
702 &ohci->regs->periodicstart); in periodic_reinit()
705 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
710 u32 temp = ohci_readl (hc, &hc->regs->roothub.register); \
711 if (temp == -1) \
712 hc->rh_state = OHCI_RH_HALTED; \
713 else if (hc->flags & OHCI_QUIRK_AMD756) \
715 temp = ohci_readl (hc, &hc->regs->roothub.register); \
721 { return ohci_readl (hc, &hc->regs->roothub.b); } in roothub_b()
723 { return ohci_readl (hc, &hc->regs->roothub.status); } in roothub_status()