Lines Matching refs:port_array
230 struct _synclinkmp_info *port_array[SCA_MAX_PORTS]; member
2560 tmp = read_reg16(info->port_array[2], ISR0); in synclinkmp_interrupt()
2563 timerstatus1 = read_reg(info->port_array[2], ISR2); in synclinkmp_interrupt()
2576 if (info->port_array[i] == NULL) in synclinkmp_interrupt()
2589 isr_rxrdy(info->port_array[i]); in synclinkmp_interrupt()
2591 isr_txrdy(info->port_array[i]); in synclinkmp_interrupt()
2593 isr_rxint(info->port_array[i]); in synclinkmp_interrupt()
2595 isr_txint(info->port_array[i]); in synclinkmp_interrupt()
2598 isr_rxdmaerror(info->port_array[i]); in synclinkmp_interrupt()
2600 isr_rxdmaok(info->port_array[i]); in synclinkmp_interrupt()
2602 isr_txdmaerror(info->port_array[i]); in synclinkmp_interrupt()
2604 isr_txdmaok(info->port_array[i]); in synclinkmp_interrupt()
2608 isr_timer(info->port_array[0]); in synclinkmp_interrupt()
2610 isr_timer(info->port_array[1]); in synclinkmp_interrupt()
2612 isr_timer(info->port_array[2]); in synclinkmp_interrupt()
2614 isr_timer(info->port_array[3]); in synclinkmp_interrupt()
2618 SLMP_INFO * port = info->port_array[i]; in synclinkmp_interrupt()
3393 info->port_array[0]->last_mem_alloc = (SCA_MEM_SIZE/4) * info->port_num; in alloc_dma_bufs()
3462 info->buffer_list = info->memory_base + info->port_array[0]->last_mem_alloc; in alloc_buf_list()
3463 info->buffer_list_phys = info->port_array[0]->last_mem_alloc; in alloc_buf_list()
3464 info->port_array[0]->last_mem_alloc += BUFFERLISTSIZE; in alloc_buf_list()
3522 buf_list_ex[i].virt_addr = info->memory_base + info->port_array[0]->last_mem_alloc; in alloc_frame_bufs()
3523 phys_addr = info->port_array[0]->last_mem_alloc; in alloc_frame_bufs()
3524 info->port_array[0]->last_mem_alloc += SCABUFSIZE; in alloc_frame_bufs()
3831 SLMP_INFO *port_array[SCA_MAX_PORTS]; in device_init() local
3836 port_array[port] = alloc_dev(adapter_num,port,pdev); in device_init()
3837 if( port_array[port] == NULL ) { in device_init()
3839 kfree(port_array[port]); in device_init()
3846 memcpy(port_array[port]->port_array,port_array,sizeof(port_array)); in device_init()
3847 add_device( port_array[port] ); in device_init()
3848 spin_lock_init(&port_array[port]->lock); in device_init()
3852 if ( !claim_resources(port_array[0]) ) { in device_init()
3854 alloc_dma_bufs(port_array[0]); in device_init()
3858 port_array[port]->lock = port_array[0]->lock; in device_init()
3859 port_array[port]->irq_level = port_array[0]->irq_level; in device_init()
3860 port_array[port]->memory_base = port_array[0]->memory_base; in device_init()
3861 port_array[port]->sca_base = port_array[0]->sca_base; in device_init()
3862 port_array[port]->statctrl_base = port_array[0]->statctrl_base; in device_init()
3863 port_array[port]->lcr_base = port_array[0]->lcr_base; in device_init()
3864 alloc_dma_bufs(port_array[port]); in device_init()
3867 if ( request_irq(port_array[0]->irq_level, in device_init()
3869 port_array[0]->irq_flags, in device_init()
3870 port_array[0]->device_name, in device_init()
3871 port_array[0]) < 0 ) { in device_init()
3874 port_array[0]->device_name, in device_init()
3875 port_array[0]->irq_level ); in device_init()
3878 port_array[0]->irq_requested = true; in device_init()
3879 adapter_test(port_array[0]); in device_init()
4034 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in enable_loopback()
4371 if (info->port_array[i]) in reset_adapter()
4372 reset_port(info->port_array[i]); in reset_adapter()
4457 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in async_mode()
4634 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in hdlc_mode()
4636 info->port_array[0]->ctrlreg_value &= ~(BIT0 << (info->port_num * 2)); in hdlc_mode()
4783 info->port_array[0]->ctrlreg_value &= ~EnableBit; in set_signals()
4785 info->port_array[0]->ctrlreg_value |= EnableBit; in set_signals()
5231 sca_init(info->port_array[0]); in init_adapter()
5232 sca_init(info->port_array[2]); in init_adapter()
5316 info->port_array[0]->port_count = 0; in adapter_test()
5318 if ( register_test(info->port_array[0]) && in adapter_test()
5319 register_test(info->port_array[1])) { in adapter_test()
5321 info->port_array[0]->port_count = 2; in adapter_test()
5323 if ( register_test(info->port_array[2]) && in adapter_test()
5324 register_test(info->port_array[3]) ) in adapter_test()
5325 info->port_array[0]->port_count += 2; in adapter_test()
5333 if ( !irq_test(info->port_array[0]) || in adapter_test()
5334 !irq_test(info->port_array[1]) || in adapter_test()
5335 (info->port_count == 4 && !irq_test(info->port_array[2])) || in adapter_test()
5336 (info->port_count == 4 && !irq_test(info->port_array[3]))) { in adapter_test()
5342 if (!loopback_test(info->port_array[0]) || in adapter_test()
5343 !loopback_test(info->port_array[1]) || in adapter_test()
5344 (info->port_count == 4 && !loopback_test(info->port_array[2])) || in adapter_test()
5345 (info->port_count == 4 && !loopback_test(info->port_array[3]))) { in adapter_test()
5355 info->port_array[0]->init_error = 0; in adapter_test()
5356 info->port_array[1]->init_error = 0; in adapter_test()
5358 info->port_array[2]->init_error = 0; in adapter_test()
5359 info->port_array[3]->init_error = 0; in adapter_test()
5583 *RegAddr = info->port_array[0]->ctrlreg_value; in write_control_reg()