Lines Matching full:port
53 static inline void wait_for_xmitr(struct uart_port *port, int bits) in wait_for_xmitr() argument
55 if (!(msm_read(port, UART_SR) & UART_SR_TX_EMPTY)) in wait_for_xmitr()
56 while ((msm_read(port, UART_ISR) & bits) != bits) in wait_for_xmitr()
60 static void msm_stop_tx(struct uart_port *port) in msm_stop_tx() argument
62 struct msm_port *msm_port = UART_TO_MSM(port); in msm_stop_tx()
65 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_tx()
68 static void msm_start_tx(struct uart_port *port) in msm_start_tx() argument
70 struct msm_port *msm_port = UART_TO_MSM(port); in msm_start_tx()
73 msm_write(port, msm_port->imr, UART_IMR); in msm_start_tx()
76 static void msm_stop_rx(struct uart_port *port) in msm_stop_rx() argument
78 struct msm_port *msm_port = UART_TO_MSM(port); in msm_stop_rx()
81 msm_write(port, msm_port->imr, UART_IMR); in msm_stop_rx()
84 static void msm_enable_ms(struct uart_port *port) in msm_enable_ms() argument
86 struct msm_port *msm_port = UART_TO_MSM(port); in msm_enable_ms()
89 msm_write(port, msm_port->imr, UART_IMR); in msm_enable_ms()
92 static void handle_rx_dm(struct uart_port *port, unsigned int misr) in handle_rx_dm() argument
94 struct tty_struct *tty = port->state->port.tty; in handle_rx_dm()
97 struct msm_port *msm_port = UART_TO_MSM(port); in handle_rx_dm()
99 if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) { in handle_rx_dm()
100 port->icount.overrun++; in handle_rx_dm()
102 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in handle_rx_dm()
106 count = msm_read(port, UARTDM_RX_TOTAL_SNAP) - in handle_rx_dm()
110 count = 4 * (msm_read(port, UART_RFWR)); in handle_rx_dm()
116 port->icount.rx += count; in handle_rx_dm()
121 sr = msm_read(port, UART_SR); in handle_rx_dm()
126 c = msm_read(port, UARTDM_RF); in handle_rx_dm()
128 port->icount.brk++; in handle_rx_dm()
129 if (uart_handle_break(port)) in handle_rx_dm()
132 port->icount.frame++; in handle_rx_dm()
142 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in handle_rx_dm()
143 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in handle_rx_dm()
144 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in handle_rx_dm()
147 static void handle_rx(struct uart_port *port) in handle_rx() argument
149 struct tty_struct *tty = port->state->port.tty; in handle_rx()
156 if ((msm_read(port, UART_SR) & UART_SR_OVERRUN)) { in handle_rx()
157 port->icount.overrun++; in handle_rx()
159 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in handle_rx()
163 while ((sr = msm_read(port, UART_SR)) & UART_SR_RX_READY) { in handle_rx()
167 c = msm_read(port, UART_RF); in handle_rx()
170 port->icount.brk++; in handle_rx()
171 if (uart_handle_break(port)) in handle_rx()
174 port->icount.frame++; in handle_rx()
176 port->icount.rx++; in handle_rx()
180 sr &= port->read_status_mask; in handle_rx()
188 if (!uart_handle_sysrq_char(port, c)) in handle_rx()
195 static void reset_dm_count(struct uart_port *port) in reset_dm_count() argument
197 wait_for_xmitr(port, UART_ISR_TX_READY); in reset_dm_count()
198 msm_write(port, 1, UARTDM_NCF_TX); in reset_dm_count()
201 static void handle_tx(struct uart_port *port) in handle_tx() argument
203 struct circ_buf *xmit = &port->state->xmit; in handle_tx()
204 struct msm_port *msm_port = UART_TO_MSM(port); in handle_tx()
207 if (port->x_char) { in handle_tx()
209 reset_dm_count(port); in handle_tx()
211 msm_write(port, port->x_char, in handle_tx()
213 port->icount.tx++; in handle_tx()
214 port->x_char = 0; in handle_tx()
218 reset_dm_count(port); in handle_tx()
220 while (msm_read(port, UART_SR) & UART_SR_TX_READY) { in handle_tx()
224 msm_write(port, msm_port->imr, UART_IMR); in handle_tx()
227 msm_write(port, xmit->buf[xmit->tail], in handle_tx()
231 reset_dm_count(port); in handle_tx()
234 port->icount.tx++; in handle_tx()
239 uart_write_wakeup(port); in handle_tx()
242 static void handle_delta_cts(struct uart_port *port) in handle_delta_cts() argument
244 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); in handle_delta_cts()
245 port->icount.cts++; in handle_delta_cts()
246 wake_up_interruptible(&port->state->port.delta_msr_wait); in handle_delta_cts()
251 struct uart_port *port = dev_id; in msm_irq() local
252 struct msm_port *msm_port = UART_TO_MSM(port); in msm_irq()
255 spin_lock(&port->lock); in msm_irq()
256 misr = msm_read(port, UART_MISR); in msm_irq()
257 msm_write(port, 0, UART_IMR); /* disable interrupt */ in msm_irq()
261 handle_rx_dm(port, misr); in msm_irq()
263 handle_rx(port); in msm_irq()
266 handle_tx(port); in msm_irq()
268 handle_delta_cts(port); in msm_irq()
270 msm_write(port, msm_port->imr, UART_IMR); /* restore interrupt */ in msm_irq()
271 spin_unlock(&port->lock); in msm_irq()
276 static unsigned int msm_tx_empty(struct uart_port *port) in msm_tx_empty() argument
278 return (msm_read(port, UART_SR) & UART_SR_TX_EMPTY) ? TIOCSER_TEMT : 0; in msm_tx_empty()
281 static unsigned int msm_get_mctrl(struct uart_port *port) in msm_get_mctrl() argument
287 static void msm_reset(struct uart_port *port) in msm_reset() argument
290 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); in msm_reset()
291 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); in msm_reset()
292 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_reset()
293 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR); in msm_reset()
294 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); in msm_reset()
295 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR); in msm_reset()
298 void msm_set_mctrl(struct uart_port *port, unsigned int mctrl) in msm_set_mctrl() argument
301 mr = msm_read(port, UART_MR1); in msm_set_mctrl()
305 msm_write(port, mr, UART_MR1); in msm_set_mctrl()
306 msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR); in msm_set_mctrl()
309 msm_write(port, mr, UART_MR1); in msm_set_mctrl()
313 static void msm_break_ctl(struct uart_port *port, int break_ctl) in msm_break_ctl() argument
316 msm_write(port, UART_CR_CMD_START_BREAK, UART_CR); in msm_break_ctl()
318 msm_write(port, UART_CR_CMD_STOP_BREAK, UART_CR); in msm_break_ctl()
321 static int msm_set_baud_rate(struct uart_port *port, unsigned int baud) in msm_set_baud_rate() argument
324 struct msm_port *msm_port = UART_TO_MSM(port); in msm_set_baud_rate()
380 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); in msm_set_baud_rate()
382 msm_write(port, baud_code, UART_CSR); in msm_set_baud_rate()
388 msm_write(port, watermark, UART_IPR); in msm_set_baud_rate()
391 watermark = (port->fifosize * 3) / 4; in msm_set_baud_rate()
392 msm_write(port, watermark, UART_RFWR); in msm_set_baud_rate()
395 msm_write(port, 10, UART_TFWR); in msm_set_baud_rate()
398 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_set_baud_rate()
399 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in msm_set_baud_rate()
400 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_set_baud_rate()
407 static void msm_init_clock(struct uart_port *port) in msm_init_clock() argument
409 struct msm_port *msm_port = UART_TO_MSM(port); in msm_init_clock()
414 msm_serial_set_mnd_regs(port); in msm_init_clock()
417 static int msm_startup(struct uart_port *port) in msm_startup() argument
419 struct msm_port *msm_port = UART_TO_MSM(port); in msm_startup()
424 "msm_serial%d", port->line); in msm_startup()
426 ret = request_irq(port->irq, msm_irq, IRQF_TRIGGER_HIGH, in msm_startup()
427 msm_port->name, port); in msm_startup()
431 msm_init_clock(port); in msm_startup()
433 if (likely(port->fifosize > 12)) in msm_startup()
434 rfr_level = port->fifosize - 12; in msm_startup()
436 rfr_level = port->fifosize; in msm_startup()
439 data = msm_read(port, UART_MR1); in msm_startup()
444 msm_write(port, data, UART_MR1); in msm_startup()
447 data = msm_read(port, UART_IPR); in msm_startup()
451 msm_write(port, data, UART_IPR); in msm_startup()
455 if (!port->cons || (port->cons && !(port->cons->flags & CON_ENABLED))) { in msm_startup()
456 msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); in msm_startup()
457 msm_reset(port); in msm_startup()
462 msm_write(port, data, UART_CR); /* enable TX & RX */ in msm_startup()
466 msm_write(port, UART_IPR_STALE_LSB, UART_IPR); in msm_startup()
473 msm_write(port, 0xFFFFFF, UARTDM_DMRX); in msm_startup()
474 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_startup()
475 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_startup()
478 msm_write(port, msm_port->imr, UART_IMR); in msm_startup()
482 static void msm_shutdown(struct uart_port *port) in msm_shutdown() argument
484 struct msm_port *msm_port = UART_TO_MSM(port); in msm_shutdown()
487 msm_write(port, 0, UART_IMR); /* disable interrupts */ in msm_shutdown()
491 free_irq(port->irq, port); in msm_shutdown()
494 static void msm_set_termios(struct uart_port *port, struct ktermios *termios, in msm_set_termios() argument
500 spin_lock_irqsave(&port->lock, flags); in msm_set_termios()
503 baud = uart_get_baud_rate(port, termios, old, 300, 115200); in msm_set_termios()
504 baud = msm_set_baud_rate(port, baud); in msm_set_termios()
509 mr = msm_read(port, UART_MR2); in msm_set_termios()
546 msm_write(port, mr, UART_MR2); in msm_set_termios()
549 mr = msm_read(port, UART_MR1); in msm_set_termios()
555 msm_write(port, mr, UART_MR1); in msm_set_termios()
558 port->read_status_mask = 0; in msm_set_termios()
560 port->read_status_mask |= UART_SR_PAR_FRAME_ERR; in msm_set_termios()
562 port->read_status_mask |= UART_SR_RX_BREAK; in msm_set_termios()
564 uart_update_timeout(port, termios->c_cflag, baud); in msm_set_termios()
566 spin_unlock_irqrestore(&port->lock, flags); in msm_set_termios()
569 static const char *msm_type(struct uart_port *port) in msm_type() argument
574 static void msm_release_port(struct uart_port *port) in msm_release_port() argument
576 struct platform_device *pdev = to_platform_device(port->dev); in msm_release_port()
577 struct msm_port *msm_port = UART_TO_MSM(port); in msm_release_port()
587 release_mem_region(port->mapbase, size); in msm_release_port()
588 iounmap(port->membase); in msm_release_port()
589 port->membase = NULL; in msm_release_port()
608 static int msm_request_port(struct uart_port *port) in msm_request_port() argument
610 struct msm_port *msm_port = UART_TO_MSM(port); in msm_request_port()
611 struct platform_device *pdev = to_platform_device(port->dev); in msm_request_port()
623 if (!request_mem_region(port->mapbase, size, "msm_serial")) in msm_request_port()
626 port->membase = ioremap(port->mapbase, size); in msm_request_port()
627 if (!port->membase) { in msm_request_port()
633 /* Is this a GSBI-based port? */ in msm_request_port()
655 release_mem_region(port->mapbase, size); in msm_request_port()
659 static void msm_config_port(struct uart_port *port, int flags) in msm_config_port() argument
661 struct msm_port *msm_port = UART_TO_MSM(port); in msm_config_port()
664 port->type = PORT_MSM; in msm_config_port()
665 ret = msm_request_port(port); in msm_config_port()
675 static int msm_verify_port(struct uart_port *port, struct serial_struct *ser) in msm_verify_port() argument
679 if (unlikely(port->irq != ser->irq)) in msm_verify_port()
684 static void msm_power(struct uart_port *port, unsigned int state, in msm_power() argument
687 struct msm_port *msm_port = UART_TO_MSM(port); in msm_power()
764 static void msm_console_putchar(struct uart_port *port, int c) in msm_console_putchar() argument
766 struct msm_port *msm_port = UART_TO_MSM(port); in msm_console_putchar()
769 reset_dm_count(port); in msm_console_putchar()
771 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY)) in msm_console_putchar()
773 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF); in msm_console_putchar()
779 struct uart_port *port; in msm_console_write() local
784 port = get_port_from_line(co->index); in msm_console_write()
785 msm_port = UART_TO_MSM(port); in msm_console_write()
787 spin_lock(&port->lock); in msm_console_write()
788 uart_console_write(port, s, count, msm_console_putchar); in msm_console_write()
789 spin_unlock(&port->lock); in msm_console_write()
794 struct uart_port *port; in msm_console_setup() local
801 port = get_port_from_line(co->index); in msm_console_setup()
802 msm_port = UART_TO_MSM(port); in msm_console_setup()
804 if (unlikely(!port->membase)) in msm_console_setup()
807 msm_init_clock(port); in msm_console_setup()
815 msm_write(port, UART_MR2_BITS_PER_CHAR_8 | UART_MR2_STOP_BIT_LEN_ONE, in msm_console_setup()
820 msm_set_baud_rate(port, baud); in msm_console_setup()
822 msm_reset(port); in msm_console_setup()
825 msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR); in msm_console_setup()
826 msm_write(port, UART_CR_TX_ENABLE, UART_CR); in msm_console_setup()
829 printk(KERN_INFO "msm_serial: console setup on port #%d\n", port->line); in msm_console_setup()
831 return uart_set_options(port, co, baud, parity, bits, flow); in msm_console_setup()
866 struct uart_port *port; in msm_serial_probe() local
875 printk(KERN_INFO "msm_serial: detected port #%d\n", pdev->id); in msm_serial_probe()
877 port = get_port_from_line(pdev->id); in msm_serial_probe()
878 port->dev = &pdev->dev; in msm_serial_probe()
879 msm_port = UART_TO_MSM(port); in msm_serial_probe()
901 port->uartclk = clk_get_rate(msm_port->clk); in msm_serial_probe()
902 printk(KERN_INFO "uartclk = %d\n", port->uartclk); in msm_serial_probe()
908 port->mapbase = resource->start; in msm_serial_probe()
913 port->irq = irq; in msm_serial_probe()
915 platform_set_drvdata(pdev, port); in msm_serial_probe()
917 return uart_add_one_port(&msm_uart_driver, port); in msm_serial_probe()