Lines Matching full:spi
38 #include <linux/spi/spi.h>
46 /* OMAP2 has 3 SPI controllers, while OMAP3 has 4 */
169 static inline void mcspi_write_cs_reg(const struct spi_device *spi, in mcspi_write_cs_reg() argument
172 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_cs_reg()
177 static inline u32 mcspi_read_cs_reg(const struct spi_device *spi, int idx) in mcspi_read_cs_reg() argument
179 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_read_cs_reg()
184 static inline u32 mcspi_cached_chconf0(const struct spi_device *spi) in mcspi_cached_chconf0() argument
186 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_cached_chconf0()
191 static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) in mcspi_write_chconf0() argument
193 struct omap2_mcspi_cs *cs = spi->controller_state; in mcspi_write_chconf0()
196 mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); in mcspi_write_chconf0()
197 mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); in mcspi_write_chconf0()
200 static void omap2_mcspi_set_dma_req(const struct spi_device *spi, in omap2_mcspi_set_dma_req() argument
205 l = mcspi_cached_chconf0(spi); in omap2_mcspi_set_dma_req()
213 mcspi_write_chconf0(spi, l); in omap2_mcspi_set_dma_req()
216 static void omap2_mcspi_set_enable(const struct spi_device *spi, int enable) in omap2_mcspi_set_enable() argument
221 mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCTRL0, l); in omap2_mcspi_set_enable()
223 mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCTRL0); in omap2_mcspi_set_enable()
226 static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active) in omap2_mcspi_force_cs() argument
230 l = mcspi_cached_chconf0(spi); in omap2_mcspi_force_cs()
232 mcspi_write_chconf0(spi, l); in omap2_mcspi_force_cs()
292 omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) in omap2_mcspi_txrx_dma() argument
295 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_txrx_dma()
306 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_txrx_dma()
307 mcspi_dma = &mcspi->dma_channels[spi->chip_select]; in omap2_mcspi_txrx_dma()
308 l = mcspi_cached_chconf0(spi); in omap2_mcspi_txrx_dma()
369 omap2_mcspi_set_dma_req(spi, 0, 1); in omap2_mcspi_txrx_dma()
374 omap2_mcspi_set_dma_req(spi, 1, 1); in omap2_mcspi_txrx_dma()
379 dma_unmap_single(&spi->dev, xfer->tx_dma, count, DMA_TO_DEVICE); in omap2_mcspi_txrx_dma()
385 dev_err(&spi->dev, "TXS timed out\n"); in omap2_mcspi_txrx_dma()
388 dev_err(&spi->dev, "EOT timed out\n"); in omap2_mcspi_txrx_dma()
394 dma_unmap_single(&spi->dev, xfer->rx_dma, count, DMA_FROM_DEVICE); in omap2_mcspi_txrx_dma()
395 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_dma()
399 if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0) in omap2_mcspi_txrx_dma()
403 w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0); in omap2_mcspi_txrx_dma()
411 dev_err(&spi->dev, in omap2_mcspi_txrx_dma()
416 omap2_mcspi_set_enable(spi, 1); in omap2_mcspi_txrx_dma()
421 if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0) in omap2_mcspi_txrx_dma()
425 w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0); in omap2_mcspi_txrx_dma()
433 dev_err(&spi->dev, "DMA RX last word empty"); in omap2_mcspi_txrx_dma()
438 omap2_mcspi_set_enable(spi, 1); in omap2_mcspi_txrx_dma()
444 omap2_mcspi_txrx_pio(struct spi_device *spi, struct spi_transfer *xfer) in omap2_mcspi_txrx_pio() argument
447 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_txrx_pio()
456 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_txrx_pio()
461 l = mcspi_cached_chconf0(spi); in omap2_mcspi_txrx_pio()
484 dev_err(&spi->dev, "TXS timed out\n"); in omap2_mcspi_txrx_pio()
487 dev_vdbg(&spi->dev, "write-%d %02x\n", in omap2_mcspi_txrx_pio()
494 dev_err(&spi->dev, "RXS timed out\n"); in omap2_mcspi_txrx_pio()
500 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
502 dev_vdbg(&spi->dev, "read-%d %02x\n", in omap2_mcspi_txrx_pio()
506 dev_err(&spi->dev, in omap2_mcspi_txrx_pio()
512 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
516 dev_vdbg(&spi->dev, "read-%d %02x\n", in omap2_mcspi_txrx_pio()
531 dev_err(&spi->dev, "TXS timed out\n"); in omap2_mcspi_txrx_pio()
534 dev_vdbg(&spi->dev, "write-%d %04x\n", in omap2_mcspi_txrx_pio()
541 dev_err(&spi->dev, "RXS timed out\n"); in omap2_mcspi_txrx_pio()
547 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
549 dev_vdbg(&spi->dev, "read-%d %04x\n", in omap2_mcspi_txrx_pio()
553 dev_err(&spi->dev, in omap2_mcspi_txrx_pio()
559 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
563 dev_vdbg(&spi->dev, "read-%d %04x\n", in omap2_mcspi_txrx_pio()
578 dev_err(&spi->dev, "TXS timed out\n"); in omap2_mcspi_txrx_pio()
581 dev_vdbg(&spi->dev, "write-%d %08x\n", in omap2_mcspi_txrx_pio()
588 dev_err(&spi->dev, "RXS timed out\n"); in omap2_mcspi_txrx_pio()
594 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
596 dev_vdbg(&spi->dev, "read-%d %08x\n", in omap2_mcspi_txrx_pio()
600 dev_err(&spi->dev, in omap2_mcspi_txrx_pio()
606 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
610 dev_vdbg(&spi->dev, "read-%d %08x\n", in omap2_mcspi_txrx_pio()
620 dev_err(&spi->dev, "TXS timed out\n"); in omap2_mcspi_txrx_pio()
623 dev_err(&spi->dev, "EOT timed out\n"); in omap2_mcspi_txrx_pio()
629 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_txrx_pio()
632 omap2_mcspi_set_enable(spi, 1); in omap2_mcspi_txrx_pio()
648 static int omap2_mcspi_setup_transfer(struct spi_device *spi, in omap2_mcspi_setup_transfer() argument
651 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_setup_transfer()
655 u8 word_len = spi->bits_per_word; in omap2_mcspi_setup_transfer()
656 u32 speed_hz = spi->max_speed_hz; in omap2_mcspi_setup_transfer()
658 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_setup_transfer()
672 l = mcspi_cached_chconf0(spi); in omap2_mcspi_setup_transfer()
685 if (!(spi->mode & SPI_CS_HIGH)) in omap2_mcspi_setup_transfer()
694 /* set SPI mode 0..3 */ in omap2_mcspi_setup_transfer()
695 if (spi->mode & SPI_CPOL) in omap2_mcspi_setup_transfer()
699 if (spi->mode & SPI_CPHA) in omap2_mcspi_setup_transfer()
704 mcspi_write_chconf0(spi, l); in omap2_mcspi_setup_transfer()
706 dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s\n", in omap2_mcspi_setup_transfer()
708 (spi->mode & SPI_CPHA) ? "trailing" : "leading", in omap2_mcspi_setup_transfer()
709 (spi->mode & SPI_CPOL) ? "inverted" : "normal"); in omap2_mcspi_setup_transfer()
716 struct spi_device *spi = data; in omap2_mcspi_dma_rx_callback() local
720 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_dma_rx_callback()
721 mcspi_dma = &(mcspi->dma_channels[spi->chip_select]); in omap2_mcspi_dma_rx_callback()
726 omap2_mcspi_set_dma_req(spi, 1, 0); in omap2_mcspi_dma_rx_callback()
731 struct spi_device *spi = data; in omap2_mcspi_dma_tx_callback() local
735 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_dma_tx_callback()
736 mcspi_dma = &(mcspi->dma_channels[spi->chip_select]); in omap2_mcspi_dma_tx_callback()
741 omap2_mcspi_set_dma_req(spi, 0, 0); in omap2_mcspi_dma_tx_callback()
744 static int omap2_mcspi_request_dma(struct spi_device *spi) in omap2_mcspi_request_dma() argument
746 struct spi_master *master = spi->master; in omap2_mcspi_request_dma()
751 mcspi_dma = mcspi->dma_channels + spi->chip_select; in omap2_mcspi_request_dma()
754 omap2_mcspi_dma_rx_callback, spi, in omap2_mcspi_request_dma()
756 dev_err(&spi->dev, "no RX DMA channel for McSPI\n"); in omap2_mcspi_request_dma()
761 omap2_mcspi_dma_tx_callback, spi, in omap2_mcspi_request_dma()
765 dev_err(&spi->dev, "no TX DMA channel for McSPI\n"); in omap2_mcspi_request_dma()
775 static int omap2_mcspi_setup(struct spi_device *spi) in omap2_mcspi_setup() argument
780 struct omap2_mcspi_cs *cs = spi->controller_state; in omap2_mcspi_setup()
782 if (spi->bits_per_word < 4 || spi->bits_per_word > 32) { in omap2_mcspi_setup()
783 dev_dbg(&spi->dev, "setup: unsupported %d bit words\n", in omap2_mcspi_setup()
784 spi->bits_per_word); in omap2_mcspi_setup()
788 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_setup()
789 mcspi_dma = &mcspi->dma_channels[spi->chip_select]; in omap2_mcspi_setup()
795 cs->base = mcspi->base + spi->chip_select * 0x14; in omap2_mcspi_setup()
796 cs->phys = mcspi->phys + spi->chip_select * 0x14; in omap2_mcspi_setup()
798 spi->controller_state = cs; in omap2_mcspi_setup()
806 ret = omap2_mcspi_request_dma(spi); in omap2_mcspi_setup()
815 ret = omap2_mcspi_setup_transfer(spi, NULL); in omap2_mcspi_setup()
821 static void omap2_mcspi_cleanup(struct spi_device *spi) in omap2_mcspi_cleanup() argument
827 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_cleanup()
829 if (spi->controller_state) { in omap2_mcspi_cleanup()
831 cs = spi->controller_state; in omap2_mcspi_cleanup()
834 kfree(spi->controller_state); in omap2_mcspi_cleanup()
837 if (spi->chip_select < spi->master->num_chipselect) { in omap2_mcspi_cleanup()
838 mcspi_dma = &mcspi->dma_channels[spi->chip_select]; in omap2_mcspi_cleanup()
870 struct spi_device *spi; in omap2_mcspi_work() local
885 spi = m->spi; in omap2_mcspi_work()
886 cs = spi->controller_state; in omap2_mcspi_work()
887 cd = spi->controller_data; in omap2_mcspi_work()
889 omap2_mcspi_set_enable(spi, 1); in omap2_mcspi_work()
897 status = omap2_mcspi_setup_transfer(spi, t); in omap2_mcspi_work()
905 omap2_mcspi_force_cs(spi, 1); in omap2_mcspi_work()
909 chconf = mcspi_cached_chconf0(spi); in omap2_mcspi_work()
924 mcspi_write_chconf0(spi, chconf); in omap2_mcspi_work()
935 count = omap2_mcspi_txrx_dma(spi, t); in omap2_mcspi_work()
937 count = omap2_mcspi_txrx_pio(spi, t); in omap2_mcspi_work()
951 omap2_mcspi_force_cs(spi, 0); in omap2_mcspi_work()
959 status = omap2_mcspi_setup_transfer(spi, NULL); in omap2_mcspi_work()
963 omap2_mcspi_force_cs(spi, 0); in omap2_mcspi_work()
965 omap2_mcspi_set_enable(spi, 0); in omap2_mcspi_work()
978 static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m) in omap2_mcspi_transfer() argument
1000 dev_dbg(&spi->dev, "transfer: %d Hz, %d %s%s, %d bpw\n", in omap2_mcspi_transfer()
1009 dev_dbg(&spi->dev, "speed_hz %d below minimum %d Hz\n", in omap2_mcspi_transfer()
1019 t->tx_dma = dma_map_single(&spi->dev, (void *) tx_buf, in omap2_mcspi_transfer()
1021 if (dma_mapping_error(&spi->dev, t->tx_dma)) { in omap2_mcspi_transfer()
1022 dev_dbg(&spi->dev, "dma %cX %d bytes error\n", in omap2_mcspi_transfer()
1028 t->rx_dma = dma_map_single(&spi->dev, rx_buf, t->len, in omap2_mcspi_transfer()
1030 if (dma_mapping_error(&spi->dev, t->rx_dma)) { in omap2_mcspi_transfer()
1031 dev_dbg(&spi->dev, "dma %cX %d bytes error\n", in omap2_mcspi_transfer()
1034 dma_unmap_single(&spi->dev, t->tx_dma, in omap2_mcspi_transfer()
1041 mcspi = spi_master_get_devdata(spi->master); in omap2_mcspi_transfer()
1098 /* the spi->mode bits understood by this driver: */ in omap2_mcspi_probe()
1247 * When SPI wake up from off-mode, CS is in activate state. If it was in