Lines Matching +full:cs +full:- +full:gpio
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
18 * Boston, MA 02110-1301, USA.
25 #include <linux/gpio.h>
59 u8 cs; member
104 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
109 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
114 return (d->devtype_data->devtype == IMX51_ECSPI) ? 64 : 8; in spi_imx_get_fifosize()
120 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
122 if (spi_imx->rx_buf) { \
123 *(type *)spi_imx->rx_buf = val; \
124 spi_imx->rx_buf += sizeof(type); \
133 if (spi_imx->tx_buf) { \
134 val = *(type *)spi_imx->tx_buf; \
135 spi_imx->tx_buf += sizeof(type); \
138 spi_imx->count -= sizeof(type); \
140 writel(val, spi_imx->base + MXC_CSPITXDATA); \
190 #define MX51_ECSPI_CTRL_CS(cs) ((cs) << 18) argument
194 #define MX51_ECSPI_CONFIG_SCLKPHA(cs) (1 << ((cs) + 0)) argument
195 #define MX51_ECSPI_CONFIG_SCLKPOL(cs) (1 << ((cs) + 4)) argument
196 #define MX51_ECSPI_CONFIG_SBBCTRL(cs) (1 << ((cs) + 8)) argument
197 #define MX51_ECSPI_CONFIG_SSBPOL(cs) (1 << ((cs) + 12)) argument
210 * there are two 4-bit dividers, the pre-divider divides by in mx51_ecspi_clkdiv()
211 * $pre, the post-divider by 2^$post in mx51_ecspi_clkdiv()
218 post = fls(fin) - fls(fspi); in mx51_ecspi_clkdiv()
224 post = max(4U, post) - 4; in mx51_ecspi_clkdiv()
231 pre = DIV_ROUND_UP(fin, fspi << post) - 1; in mx51_ecspi_clkdiv()
249 writel(val, spi_imx->base + MX51_ECSPI_INT); in mx51_ecspi_intctrl()
256 reg = readl(spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
258 writel(reg, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_trigger()
276 ctrl |= mx51_ecspi_clkdiv(spi_imx->spi_clk, config->speed_hz); in mx51_ecspi_config()
279 ctrl |= MX51_ECSPI_CTRL_CS(config->cs); in mx51_ecspi_config()
281 ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET; in mx51_ecspi_config()
283 cfg |= MX51_ECSPI_CONFIG_SBBCTRL(config->cs); in mx51_ecspi_config()
285 if (config->mode & SPI_CPHA) in mx51_ecspi_config()
286 cfg |= MX51_ECSPI_CONFIG_SCLKPHA(config->cs); in mx51_ecspi_config()
288 if (config->mode & SPI_CPOL) in mx51_ecspi_config()
289 cfg |= MX51_ECSPI_CONFIG_SCLKPOL(config->cs); in mx51_ecspi_config()
291 if (config->mode & SPI_CS_HIGH) in mx51_ecspi_config()
292 cfg |= MX51_ECSPI_CONFIG_SSBPOL(config->cs); in mx51_ecspi_config()
294 writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); in mx51_ecspi_config()
295 writel(cfg, spi_imx->base + MX51_ECSPI_CONFIG); in mx51_ecspi_config()
302 return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; in mx51_ecspi_rx_available()
309 readl(spi_imx->base + MXC_CSPIRXDATA); in mx51_ecspi_reset()
344 writel(val, spi_imx->base + MXC_CSPIINT); in mx31_intctrl()
351 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
353 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_trigger()
360 int cs = spi_imx->chipselect[config->cs]; in mx31_config() local
362 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << in mx31_config()
366 reg |= (config->bpw - 1) << MX35_CSPICTRL_BL_SHIFT; in mx31_config()
369 reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; in mx31_config()
372 if (config->mode & SPI_CPHA) in mx31_config()
374 if (config->mode & SPI_CPOL) in mx31_config()
376 if (config->mode & SPI_CS_HIGH) in mx31_config()
378 if (cs < 0) in mx31_config()
379 reg |= (cs + 32) << in mx31_config()
383 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx31_config()
390 return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; in mx31_rx_available()
396 while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) in mx31_reset()
397 readl(spi_imx->base + MXC_CSPIRXDATA); in mx31_reset()
422 writel(val, spi_imx->base + MXC_CSPIINT); in mx21_intctrl()
429 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
431 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_trigger()
438 int cs = spi_imx->chipselect[config->cs]; in mx21_config() local
441 reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz, max) << in mx21_config()
443 reg |= config->bpw - 1; in mx21_config()
445 if (config->mode & SPI_CPHA) in mx21_config()
447 if (config->mode & SPI_CPOL) in mx21_config()
449 if (config->mode & SPI_CS_HIGH) in mx21_config()
451 if (cs < 0) in mx21_config()
452 reg |= (cs + 32) << MX21_CSPICTRL_CS_SHIFT; in mx21_config()
454 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx21_config()
461 return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; in mx21_rx_available()
466 writel(1, spi_imx->base + MXC_RESET); in mx21_reset()
489 writel(val, spi_imx->base + MXC_CSPIINT); in mx1_intctrl()
496 reg = readl(spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
498 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_trigger()
506 reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << in mx1_config()
508 reg |= config->bpw - 1; in mx1_config()
510 if (config->mode & SPI_CPHA) in mx1_config()
512 if (config->mode & SPI_CPOL) in mx1_config()
515 writel(reg, spi_imx->base + MXC_CSPICTRL); in mx1_config()
522 return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; in mx1_rx_available()
527 writel(1, spi_imx->base + MXC_RESET); in mx1_reset()
588 .name = "imx1-cspi",
591 .name = "imx21-cspi",
594 .name = "imx27-cspi",
597 .name = "imx31-cspi",
600 .name = "imx35-cspi",
603 .name = "imx51-ecspi",
611 { .compatible = "fsl,imx1-cspi", .data = &imx1_cspi_devtype_data, },
612 { .compatible = "fsl,imx21-cspi", .data = &imx21_cspi_devtype_data, },
613 { .compatible = "fsl,imx27-cspi", .data = &imx27_cspi_devtype_data, },
614 { .compatible = "fsl,imx31-cspi", .data = &imx31_cspi_devtype_data, },
615 { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, },
616 { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, },
622 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_chipselect()
623 int gpio = spi_imx->chipselect[spi->chip_select]; in spi_imx_chipselect() local
625 int dev_is_lowactive = !(spi->mode & SPI_CS_HIGH); in spi_imx_chipselect()
627 if (gpio < 0) in spi_imx_chipselect()
630 gpio_set_value(gpio, dev_is_lowactive ^ active); in spi_imx_chipselect()
635 while (spi_imx->txfifo < spi_imx_get_fifosize(spi_imx)) { in spi_imx_push()
636 if (!spi_imx->count) in spi_imx_push()
638 spi_imx->tx(spi_imx); in spi_imx_push()
639 spi_imx->txfifo++; in spi_imx_push()
642 spi_imx->devtype_data->trigger(spi_imx); in spi_imx_push()
649 while (spi_imx->devtype_data->rx_available(spi_imx)) { in spi_imx_isr()
650 spi_imx->rx(spi_imx); in spi_imx_isr()
651 spi_imx->txfifo--; in spi_imx_isr()
654 if (spi_imx->count) { in spi_imx_isr()
659 if (spi_imx->txfifo) { in spi_imx_isr()
663 spi_imx->devtype_data->intctrl( in spi_imx_isr()
668 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_isr()
669 complete(&spi_imx->xfer_done); in spi_imx_isr()
677 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_setupxfer()
680 config.bpw = t ? t->bits_per_word : spi->bits_per_word; in spi_imx_setupxfer()
681 config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; in spi_imx_setupxfer()
682 config.mode = spi->mode; in spi_imx_setupxfer()
683 config.cs = spi->chip_select; in spi_imx_setupxfer()
686 config.speed_hz = spi->max_speed_hz; in spi_imx_setupxfer()
688 config.bpw = spi->bits_per_word; in spi_imx_setupxfer()
690 config.speed_hz = spi->max_speed_hz; in spi_imx_setupxfer()
694 spi_imx->rx = spi_imx_buf_rx_u8; in spi_imx_setupxfer()
695 spi_imx->tx = spi_imx_buf_tx_u8; in spi_imx_setupxfer()
697 spi_imx->rx = spi_imx_buf_rx_u16; in spi_imx_setupxfer()
698 spi_imx->tx = spi_imx_buf_tx_u16; in spi_imx_setupxfer()
700 spi_imx->rx = spi_imx_buf_rx_u32; in spi_imx_setupxfer()
701 spi_imx->tx = spi_imx_buf_tx_u32; in spi_imx_setupxfer()
705 spi_imx->devtype_data->config(spi_imx, &config); in spi_imx_setupxfer()
713 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_transfer()
715 spi_imx->tx_buf = transfer->tx_buf; in spi_imx_transfer()
716 spi_imx->rx_buf = transfer->rx_buf; in spi_imx_transfer()
717 spi_imx->count = transfer->len; in spi_imx_transfer()
718 spi_imx->txfifo = 0; in spi_imx_transfer()
720 init_completion(&spi_imx->xfer_done); in spi_imx_transfer()
724 spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); in spi_imx_transfer()
726 wait_for_completion(&spi_imx->xfer_done); in spi_imx_transfer()
728 return transfer->len; in spi_imx_transfer()
733 struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); in spi_imx_setup()
734 int gpio = spi_imx->chipselect[spi->chip_select]; in spi_imx_setup() local
736 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, in spi_imx_setup()
737 spi->mode, spi->bits_per_word, spi->max_speed_hz); in spi_imx_setup()
739 if (gpio >= 0) in spi_imx_setup()
740 gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); in spi_imx_setup()
753 struct device_node *np = pdev->dev.of_node; in spi_imx_probe()
755 of_match_device(spi_imx_dt_ids, &pdev->dev); in spi_imx_probe()
757 dev_get_platdata(&pdev->dev); in spi_imx_probe()
764 dev_err(&pdev->dev, "can't get the platform data\n"); in spi_imx_probe()
765 return -EINVAL; in spi_imx_probe()
768 ret = of_property_read_u32(np, "fsl,spi-num-chipselects", &num_cs); in spi_imx_probe()
770 num_cs = mxc_platform_info->num_chipselect; in spi_imx_probe()
772 master = spi_alloc_master(&pdev->dev, in spi_imx_probe()
775 return -ENOMEM; in spi_imx_probe()
779 master->bus_num = pdev->id; in spi_imx_probe()
780 master->num_chipselect = num_cs; in spi_imx_probe()
783 spi_imx->bitbang.master = spi_master_get(master); in spi_imx_probe()
785 for (i = 0; i < master->num_chipselect; i++) { in spi_imx_probe()
786 int cs_gpio = of_get_named_gpio(np, "cs-gpios", i); in spi_imx_probe()
788 cs_gpio = mxc_platform_info->chipselect[i]; in spi_imx_probe()
790 spi_imx->chipselect[i] = cs_gpio; in spi_imx_probe()
794 ret = gpio_request(spi_imx->chipselect[i], DRIVER_NAME); in spi_imx_probe()
797 i--; in spi_imx_probe()
798 if (spi_imx->chipselect[i] >= 0) in spi_imx_probe()
799 gpio_free(spi_imx->chipselect[i]); in spi_imx_probe()
801 dev_err(&pdev->dev, "can't get cs gpios\n"); in spi_imx_probe()
806 spi_imx->bitbang.chipselect = spi_imx_chipselect; in spi_imx_probe()
807 spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; in spi_imx_probe()
808 spi_imx->bitbang.txrx_bufs = spi_imx_transfer; in spi_imx_probe()
809 spi_imx->bitbang.master->setup = spi_imx_setup; in spi_imx_probe()
810 spi_imx->bitbang.master->cleanup = spi_imx_cleanup; in spi_imx_probe()
811 spi_imx->bitbang.master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; in spi_imx_probe()
813 init_completion(&spi_imx->xfer_done); in spi_imx_probe()
815 spi_imx->devtype_data = of_id ? of_id->data : in spi_imx_probe()
816 (struct spi_imx_devtype_data *) pdev->id_entry->driver_data; in spi_imx_probe()
820 dev_err(&pdev->dev, "can't get platform resource\n"); in spi_imx_probe()
821 ret = -ENOMEM; in spi_imx_probe()
825 if (!request_mem_region(res->start, resource_size(res), pdev->name)) { in spi_imx_probe()
826 dev_err(&pdev->dev, "request_mem_region failed\n"); in spi_imx_probe()
827 ret = -EBUSY; in spi_imx_probe()
831 spi_imx->base = ioremap(res->start, resource_size(res)); in spi_imx_probe()
832 if (!spi_imx->base) { in spi_imx_probe()
833 ret = -EINVAL; in spi_imx_probe()
837 spi_imx->irq = platform_get_irq(pdev, 0); in spi_imx_probe()
838 if (spi_imx->irq < 0) { in spi_imx_probe()
839 ret = -EINVAL; in spi_imx_probe()
843 ret = request_irq(spi_imx->irq, spi_imx_isr, 0, DRIVER_NAME, spi_imx); in spi_imx_probe()
845 dev_err(&pdev->dev, "can't get irq%d: %d\n", spi_imx->irq, ret); in spi_imx_probe()
849 spi_imx->clk = clk_get(&pdev->dev, NULL); in spi_imx_probe()
850 if (IS_ERR(spi_imx->clk)) { in spi_imx_probe()
851 dev_err(&pdev->dev, "unable to get clock\n"); in spi_imx_probe()
852 ret = PTR_ERR(spi_imx->clk); in spi_imx_probe()
856 clk_enable(spi_imx->clk); in spi_imx_probe()
857 spi_imx->spi_clk = clk_get_rate(spi_imx->clk); in spi_imx_probe()
859 spi_imx->devtype_data->reset(spi_imx); in spi_imx_probe()
861 spi_imx->devtype_data->intctrl(spi_imx, 0); in spi_imx_probe()
863 master->dev.of_node = pdev->dev.of_node; in spi_imx_probe()
864 ret = spi_bitbang_start(&spi_imx->bitbang); in spi_imx_probe()
866 dev_err(&pdev->dev, "bitbang start failed with %d\n", ret); in spi_imx_probe()
870 dev_info(&pdev->dev, "probed\n"); in spi_imx_probe()
875 clk_disable(spi_imx->clk); in spi_imx_probe()
876 clk_put(spi_imx->clk); in spi_imx_probe()
878 free_irq(spi_imx->irq, spi_imx); in spi_imx_probe()
880 iounmap(spi_imx->base); in spi_imx_probe()
882 release_mem_region(res->start, resource_size(res)); in spi_imx_probe()
884 for (i = 0; i < master->num_chipselect; i++) in spi_imx_probe()
885 if (spi_imx->chipselect[i] >= 0) in spi_imx_probe()
886 gpio_free(spi_imx->chipselect[i]); in spi_imx_probe()
901 spi_bitbang_stop(&spi_imx->bitbang); in spi_imx_remove()
903 writel(0, spi_imx->base + MXC_CSPICTRL); in spi_imx_remove()
904 clk_disable(spi_imx->clk); in spi_imx_remove()
905 clk_put(spi_imx->clk); in spi_imx_remove()
906 free_irq(spi_imx->irq, spi_imx); in spi_imx_remove()
907 iounmap(spi_imx->base); in spi_imx_remove()
909 for (i = 0; i < master->num_chipselect; i++) in spi_imx_remove()
910 if (spi_imx->chipselect[i] >= 0) in spi_imx_remove()
911 gpio_free(spi_imx->chipselect[i]); in spi_imx_remove()
915 release_mem_region(res->start, resource_size(res)); in spi_imx_remove()