Lines Matching defs:brcms_phy

550 struct brcms_phy {  struct
551 struct brcms_phy_pub pubpi_ro; argument
561 struct brcms_phy *next; argument
562 struct brcms_phy_pub pubpi; argument
564 bool do_initcal;
565 bool phytest_on;
566 bool ofdm_rateset_war;
567 bool bf_preempt_4306;
568 u16 radio_chanspec;
569 u8 antsel_type;
570 u16 bw;
571 u8 txpwr_percent;
572 bool phy_init_por;
574 bool init_in_progress;
575 bool initialized;
576 bool sbtml_gm;
577 uint refcnt;
578 bool watchdog_override;
579 u8 phynoise_state;
580 uint phynoise_now;
581 int phynoise_chan_watchdog;
605 struct brcms_phy_srom_fem srom_fem2g; argument
606 struct brcms_phy_srom_fem srom_fem5g; argument
608 u8 tx_power_max;
609 u8 tx_power_max_rate_ind;
610 bool hwpwrctrl;
611 u8 nphy_txpwrctrl;
612 s8 nphy_txrx_chain;
613 bool phy_5g_pwrgain;
615 u16 phy_wreg;
616 u16 phy_wreg_limit;
618 s8 n_preamble_override;
619 u8 antswitch;
620 u8 aa2g, aa5g;
622 s8 idle_tssi[CH_5G_GROUP];
623 s8 target_idle_tssi;
624 s8 txpwr_est_Pout;
625 u8 tx_power_min;
626 u8 txpwr_limit[TXP_NUM_RATES];
627 u8 txpwr_env_limit[TXP_NUM_RATES];
628 u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN];
630 bool channel_14_wide_filter;
632 bool txpwroverride;
633 bool txpwridx_override_aphy;
634 s16 radiopwr_override;
635 u16 hwpwr_txcur;
636 u8 saved_txpwr_idx;
638 bool edcrs_threshold_lock;
640 u32 tr_R_gain_val;
641 u32 tr_T_gain_val;
643 s16 ofdm_analog_filt_bw_override;
644 s16 cck_analog_filt_bw_override;
645 s16 ofdm_rccal_override;
646 s16 cck_rccal_override;
647 u16 extlna_type;
649 uint interference_mode_crs_time;
650 u16 crsglitch_prev;
651 bool interference_mode_crs;
653 u32 phy_tx_tone_freq;
654 uint phy_lastcal;
655 bool phy_forcecal;
656 bool phy_fixed_noise;
657 u32 xtalfreq;
658 u8 pdiv;
659 s8 carrier_suppr_disable;
661 bool phy_bphy_evm;
662 bool phy_bphy_rfcs;
663 s8 phy_scraminit;
664 u8 phy_gpiosel;
666 s16 phy_txcore_disable_temp;
667 s16 phy_txcore_enable_temp;
668 s8 phy_tempsense_offset;
669 bool phy_txcore_heatedup;
671 u16 radiopwr;
672 u16 bb_atten;
673 u16 txctl1;
675 u16 mintxbias;
676 u16 mintxmag;
677 struct lo_complex_abgphy_info gphy_locomp_iq
679 s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB];
680 u16 gain_table[TX_GAIN_TABLE_LENGTH];
681 bool loopback_gain;
682 s16 max_lpback_gain_hdB;
683 s16 trsw_rx_gain_hdB;
684 u8 power_vec[8];
686 u16 rc_cal;
687 int nrssi_table_delta;
688 int nrssi_slope_scale;
689 int nrssi_slope_offset;
690 int min_rssi;
691 int max_rssi;
693 s8 txpwridx;
694 u8 min_txpower;
696 u8 a_band_high_disable;
698 u16 tx_vos;
699 u16 global_tx_bb_dc_bias_loft;
701 int rf_max;
702 int bb_max;
703 int rf_list_size;
704 int bb_list_size;
705 u16 *rf_attn_list;
706 u16 *bb_attn_list;
707 u16 padmix_mask;
708 u16 padmix_reg;
709 u16 *txmag_list;
710 uint txmag_len;
711 bool txmag_enable;
713 s8 *a_tssi_to_dbm;
714 s8 *m_tssi_to_dbm;
715 s8 *l_tssi_to_dbm;
716 s8 *h_tssi_to_dbm;
717 u8 *hwtxpwr;
719 u16 freqtrack_saved_regs[2];
720 int cur_interference_mode;
721 bool hwpwrctrl_capable;
722 bool temppwrctrl_capable;
724 uint phycal_nslope;
725 uint phycal_noffset;
726 uint phycal_mlo;
727 uint phycal_txpower;
729 u8 phy_aa2g;
731 bool nphy_tableloaded;
732 s8 nphy_rssisel;
733 u32 nphy_bb_mult_save;
734 u16 nphy_txiqlocal_bestc[11];
735 bool nphy_txiqlocal_coeffsvalid;
736 struct nphy_txpwrindex nphy_txpwrindex[PHY_CORE_NUM_2];
737 struct nphy_pwrctrl nphy_pwrctrl_info[PHY_CORE_NUM_2];
738 u16 cck2gpo;
739 u32 ofdm2gpo;
740 u32 ofdm5gpo;
741 u32 ofdm5glpo;
742 u32 ofdm5ghpo;
743 u8 bw402gpo;
744 u8 bw405gpo;
745 u8 bw405glpo;
746 u8 bw405ghpo;
747 u8 cdd2gpo;
748 u8 cdd5gpo;
749 u8 cdd5glpo;
750 u8 cdd5ghpo;
751 u8 stbc2gpo;
752 u8 stbc5gpo;
753 u8 stbc5glpo;
754 u8 stbc5ghpo;
755 u8 bwdup2gpo;
756 u8 bwdup5gpo;
757 u8 bwdup5glpo;
758 u8 bwdup5ghpo;
759 u16 mcs2gpo[8];
760 u16 mcs5gpo[8];
761 u16 mcs5glpo[8];
762 u16 mcs5ghpo[8];
763 u32 nphy_rxcalparams;
765 u8 phy_spuravoid;
766 bool phy_isspuravoid;
768 u8 phy_pabias;
769 u8 nphy_papd_skip;
770 u8 nphy_tssi_slope;
772 s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ];
773 u8 nphy_noise_index;
775 bool nphy_gain_boost;
776 bool nphy_elna_gain_config;
777 u16 old_bphy_test;
778 u16 old_bphy_testcontrol;
780 bool phyhang_avoid;
782 bool rssical_nphy;
783 u8 nphy_perical;
784 uint nphy_perical_last;
785 u8 cal_type_override;
786 u8 mphase_cal_phase_id;
787 u8 mphase_txcal_cmdidx;
788 u8 mphase_txcal_numcmds;
789 u16 mphase_txcal_bestcoeffs[11];
790 u16 nphy_txiqlocal_chanspec;
791 u16 nphy_iqcal_chanspec_2G;
792 u16 nphy_iqcal_chanspec_5G;
793 u16 nphy_rssical_chanspec_2G;
794 u16 nphy_rssical_chanspec_5G;
795 struct wlapi_timer *phycal_timer;
796 bool use_int_tx_iqlo_cal_nphy;
797 bool internal_tx_iqlo_cal_tapoff_intpa_nphy;
798 s16 nphy_lastcal_temp;
800 struct txiqcal_cache calibration_cache;
801 struct rssical_cache rssical_cache;
803 u8 nphy_txpwr_idx[2];
804 u8 nphy_papd_cal_type;
805 uint nphy_papd_last_cal;
806 u16 nphy_papd_tx_gain_at_last_cal[2];
807 u8 nphy_papd_cal_gain_index[2];
808 s16 nphy_papd_epsilon_offset[2];
809 bool nphy_papd_recal_enable;
810 u32 nphy_papd_recal_counter;
811 bool nphy_force_papd_cal;
812 bool nphy_papdcomp;
813 bool ipa2g_on;
814 bool ipa5g_on;
816 u16 classifier_state;
817 u16 clip_state[2];
818 uint nphy_deaf_count;
819 u8 rxiq_samps;
820 u8 rxiq_antsel;
822 u16 rfctrlIntc1_save;
823 u16 rfctrlIntc2_save;
824 bool first_cal_after_assoc;
825 u16 tx_rx_cal_radio_saveregs[22];
826 u16 tx_rx_cal_phy_saveregs[15];
828 u8 nphy_cal_orig_pwr_idx[2];
829 u8 nphy_txcal_pwr_idx[2];
830 u8 nphy_rxcal_pwr_idx[2];
831 u16 nphy_cal_orig_tx_gain[2];
832 struct nphy_txgains nphy_cal_target_gain;
833 u16 nphy_txcal_bbmult;
834 u16 nphy_gmval;
836 u16 nphy_saved_bbconf;
838 bool nphy_gband_spurwar_en;
839 bool nphy_gband_spurwar2_en;
840 bool nphy_aband_spurwar_en;
841 u16 nphy_rccal_value;
842 u16 nphy_crsminpwr[3];
843 struct nphy_noisevar_buf nphy_saved_noisevars;
844 bool nphy_anarxlpf_adjusted;
845 bool nphy_crsminpwr_adjusted;
846 bool nphy_noisevars_adjusted;
848 bool nphy_rxcal_active;
849 u16 radar_percal_mask;
850 bool dfs_lp_buffer_nphy;
852 u16 nphy_fineclockgatecontrol;
854 s8 rx2tx_biasentry;
856 u16 crsminpwr0;
857 u16 crsminpwrl0;
858 u16 crsminpwru0;
859 s16 noise_crsminpwr_index;
860 u16 init_gain_core1;
861 u16 init_gain_core2;
862 u16 init_gainb_core1;
863 u16 init_gainb_core2;
864 u8 aci_noise_curr_channel;
865 u16 init_gain_rfseq[4];
867 bool radio_is_on;
869 bool nphy_sample_play_lpf_bw_ctl_ovr;
871 u16 tbl_data_hi;
872 u16 tbl_data_lo;
873 u16 tbl_addr;
875 uint tbl_save_id;
876 uint tbl_save_offset;
878 u8 txpwrctrl;
879 s8 txpwrindex[PHY_CORE_MAX];
881 u8 phycal_tempdelta;
882 u32 mcs20_po;
883 u32 mcs40_po;
884 struct wiphy *wiphy;