Lines Matching defs:brcms_hardware

316 struct brcms_hardware {  struct
317 bool _piomode; /* true if pio mode */
318 struct brcms_c_info *wlc;
321 struct dma_pub *di[NFIFO]; /* dma handles, per fifo */
323 uint unit; /* device instance number */
326 u16 vendorid; /* PCI vendor id */
327 u16 deviceid; /* PCI device id */
328 uint corerev; /* core revision */
329 u8 sromrev; /* version # of the srom */
330 u16 boardrev; /* version # of particular board */
331 u32 boardflags; /* Board specific flags from srom */
332 u32 boardflags2; /* More board flags if sromrev >= 4 */
333 u32 machwcap; /* MAC capabilities */
334 u32 machwcap_backup; /* backup of machwcap */
336 struct si_pub *sih; /* SI handle (cookie for siutils calls) */
337 struct bcma_device *d11core; /* pointer to 802.11 core */
338 struct phy_shim_info *physhim; /* phy shim layer handler */
339 struct shared_phy *phy_sh; /* pointer to shared phy state */
340 struct brcms_hw_band *band;/* pointer to active per-band state */
342 struct brcms_hw_band *bandstate[MAXBANDS];
343 u16 bmac_phytxant; /* cache of high phytxant state */
344 bool shortslot; /* currently using 11g ShortSlot timing */
345 u16 SRL; /* 802.11 dot11ShortRetryLimit */
346 u16 LRL; /* 802.11 dot11LongRetryLimit */
347 u16 SFBL; /* Short Frame Rate Fallback Limit */
348 u16 LFBL; /* Long Frame Rate Fallback Limit */
350 bool up; /* d11 hardware up and running */
351 uint now; /* # elapsed seconds */
352 uint _nbands; /* # bands supported */
353 u16 chanspec; /* bmac chanspec shadow */
355 uint *txavail[NFIFO]; /* # tx descriptors available */
356 const u16 *xmtfifo_sz; /* fifo size in 256B for each xmt fifo */
358 u32 pllreq; /* pll requests to keep PLL on */
360 u8 suspended_fifos; /* Which TX fifo to remain awake for */
361 u32 maccontrol; /* Cached value of maccontrol */
362 uint mac_suspend_depth; /* current depth of mac_suspend levels */
363 u32 wake_override; /* bit flags to force MAC to WAKE mode */
364 u32 mute_override; /* Prevent ucode from sending beacons */
365 u8 etheraddr[ETH_ALEN]; /* currently configured ethernet address */
366 bool noreset; /* true= do not reset hw, used by WLC_OUT */
367 bool forcefastclk; /* true if h/w is forcing to use fast clk */
368 bool clk; /* core is out of reset and has clock */
369 bool sbclk; /* sb has clock */
370 bool phyclk; /* phy is out of reset and has clock */
372 bool ucode_loaded; /* true after ucode downloaded */
375 u8 hw_stf_ss_opmode; /* STF single stream operation mode */
376 u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic
379 u32 antsel_avail; /*