Lines Matching +full:0 +full:x40000000

32 #define IXGBE_RTTDCS_TDPAC      0x00000001 /* 0 Round Robin,
35 #define IXGBE_RTTDCS_VMPAC      0x00000002 /* 0 Round Robin,
38 #define IXGBE_RTTDCS_TDRM       0x00000010 /* Transmit Recycle Mode */
39 #define IXGBE_RTTDCS_ARBDIS     0x00000040 /* DCB arbiter disable */
40 #define IXGBE_RTTDCS_BDPM       0x00400000 /* Bypass Data Pipe - must clear! */
41 #define IXGBE_RTTDCS_BPBFSM     0x00800000 /* Bypass PB Free Space - must
44 #define IXGBE_RTTDCS_SPEED_CHG  0x80000000 /* Link speed change */
53 #define IXGBE_RTRPT4C_GSP       0x40000000 /* GSP enable bit */
54 #define IXGBE_RTRPT4C_LSP       0x80000000 /* LSP enable bit */
56 #define IXGBE_RDRXCTL_MPBEN     0x00000010 /* DMA config for multiple packet
59 #define IXGBE_RDRXCTL_MCEN      0x00000040 /* DMA config for multiple cores
64 #define IXGBE_RTRPCS_RRM        0x00000002 /* Receive Recycle Mode enable */
65 /* Receive Arbitration Control: 0 Round Robin, 1 DFP */
66 #define IXGBE_RTRPCS_RAC        0x00000004
67 #define IXGBE_RTRPCS_ARBDIS     0x00000040 /* Arbitration disable bit */
72 #define IXGBE_RTTDT2C_GSP       0x40000000
73 #define IXGBE_RTTDT2C_LSP       0x80000000
77 #define IXGBE_RTTPT2C_GSP       0x40000000
78 #define IXGBE_RTTPT2C_LSP       0x80000000
81 #define IXGBE_RTTPCS_TPPAC      0x00000020 /* 0 Round Robin,
84 #define IXGBE_RTTPCS_ARBDIS     0x00000040 /* Arbiter disable */
85 #define IXGBE_RTTPCS_TPRM       0x00000100 /* Transmit Recycle Mode enable */
87 #define IXGBE_RTTPCS_ARBD_DCB   0x4        /* Arbitration delay in DCB mode */
90 #define IXGBE_SECTX_DCB		0x00001F00 /* DCB TX Buffer IFG */