Lines Matching defs:ucc_geth_scheduler

454 struct ucc_geth_scheduler {  struct
455 	u16 cpucount0;		/* CPU packet counter */
456 	u16 cpucount1;		/* CPU packet counter */
457 	u16 cecount0;		/* QE packet counter */
458 	u16 cecount1;		/* QE packet counter */
459 	u16 cpucount2;		/* CPU packet counter */
460 	u16 cpucount3;		/* CPU packet counter */
461 	u16 cecount2;		/* QE packet counter */
462 	u16 cecount3;		/* QE packet counter */
463 	u16 cpucount4;		/* CPU packet counter */
464 	u16 cpucount5;		/* CPU packet counter */
465 	u16 cecount4;		/* QE packet counter */
466 	u16 cecount5;		/* QE packet counter */
467 	u16 cpucount6;		/* CPU packet counter */
468 	u16 cpucount7;		/* CPU packet counter */
469 	u16 cecount6;		/* QE packet counter */
470 	u16 cecount7;		/* QE packet counter */
471 	u32 weightstatus[NUM_TX_QUEUES];	/* accumulated weight factor */
472 	u32 rtsrshadow;		/* temporary variable handled by QE */
473 	u32 time;		/* temporary variable handled by QE */
474 	u32 ttl;		/* temporary variable handled by QE */
475 	u32 mblinterval;	/* max burst length interval */
476 	u16 nortsrbytetime;	/* normalized value of byte time in tsr units */
477 	u8 fracsiz;		/* radix 2 log value of denom. of
479 	u8 res0[1];
480 	u8 strictpriorityq;	/* Strict Priority Mask register */
481 	u8 txasap;		/* Transmit ASAP register */
482 	u8 extrabw;		/* Extra BandWidth register */
483 	u8 oldwfqmask;		/* temporary variable handled by QE */
484 	u8 weightfactor[NUM_TX_QUEUES];
486 	u32 minw;		/* temporary variable handled by QE */
487 	u8 res1[0x70 - 0x64];