Lines Matching defs:bp
141 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) argument
143 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) argument
144 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset)) argument
145 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset)) argument
147 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset)) argument
148 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset)) argument
149 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset)) argument
151 #define REG_RD_IND(bp, offset) bnx2x_reg_rd_ind(bp, offset) argument
152 #define REG_WR_IND(bp, offset, val) bnx2x_reg_wr_ind(bp, offset, val) argument
154 #define REG_RD_DMAE(bp, offset, valp, len32) \ argument
160 #define REG_WR_DMAE(bp, offset, valp, len32) \ argument
167 #define REG_WR_DMAE_LEN(bp, offset, valp, len32) \ argument
170 #define VIRT_WR_DMAE_LEN(bp, data, addr, len32, le32_swap) \ argument
176 #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \ argument
178 #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) argument
179 #define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) argument
181 #define SHMEM2_ADDR(bp, field) (bp->common.shmem2_base + \ argument
183 #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) argument
184 #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) argument
185 #define MF_CFG_ADDR(bp, field) (bp->common.mf_cfg_base + \ argument
187 #define MF2_CFG_ADDR(bp, field) (bp->common.mf2_cfg_base + \ argument
190 #define MF_CFG_RD(bp, field) REG_RD(bp, MF_CFG_ADDR(bp, field)) argument
191 #define MF_CFG_WR(bp, field, val) REG_WR(bp,\ argument
193 #define MF2_CFG_RD(bp, field) REG_RD(bp, MF2_CFG_ADDR(bp, field)) argument
195 #define SHMEM2_HAS(bp, field) ((bp)->common.shmem2_base && \ argument
199 #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) argument
200 #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) argument
292 #define MAX_ETH_TXQ_IDX(bp) (MAX_TXQS_PER_COS * (bp)->max_cos) argument
293 #define FCOE_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp)) argument
325 #define BRB_SIZE(bp) (CHIP_IS_E3(bp) ? 1024 : 512) argument
326 #define MAX_AGG_QS(bp) (CHIP_IS_E1(bp) ? \ argument
329 #define FW_DROP_LEVEL(bp) (3 + MAX_SPQ_PENDING + MAX_AGG_QS(bp)) argument
373 #define SGE_TH_LO(bp) (NUM_SGE_REQ + \ argument
375 #define SGE_TH_HI(bp) (SGE_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
477 struct bnx2x *bp; /* parent */ member
559 #define bnx2x_fp(bp, nr, var) (bp->fp[nr].var) argument
566 #define bnx2x_fcoe_fp(bp) (&bp->fp[FCOE_IDX]) argument
567 #define bnx2x_fcoe(bp, var) (bnx2x_fcoe_fp(bp)->var) argument
568 #define bnx2x_fcoe_tx(bp, var) (bnx2x_fcoe_fp(bp)-> \ argument
620 #define BD_TH_LO(bp) (NUM_BD_REQ + \ argument
623 #define BD_TH_HI(bp) (BD_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
668 #define RCQ_TH_LO(bp) (NUM_RCQ_REQ + \ argument
671 #define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
697 #define DOORBELL(bp, cid, val) \ argument
789 #define CHIP_ID(bp) (bp->common.chip_id & 0xfffffff0) argument
791 #define CHIP_NUM(bp) (bp->common.chip_id >> 16) argument
805 #define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) argument
806 #define CHIP_IS_57711(bp) (CHIP_NUM(bp) == CHIP_NUM_57711) argument
807 #define CHIP_IS_57711E(bp) (CHIP_NUM(bp) == CHIP_NUM_57711E) argument
808 #define CHIP_IS_57712(bp) (CHIP_NUM(bp) == CHIP_NUM_57712) argument
809 #define CHIP_IS_57712_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_MF) argument
810 #define CHIP_IS_57800(bp) (CHIP_NUM(bp) == CHIP_NUM_57800) argument
811 #define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF) argument
812 #define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810) argument
813 #define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF) argument
814 #define CHIP_IS_57840(bp) (CHIP_NUM(bp) == CHIP_NUM_57840) argument
815 #define CHIP_IS_57840_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_MF) argument
816 #define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ argument
818 #define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ argument
820 #define CHIP_IS_E3(bp) (CHIP_IS_57800(bp) || \ argument
826 #define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp))) argument
827 #define USES_WARPCORE(bp) (CHIP_IS_E3(bp)) argument
832 #define CHIP_REV_VAL(bp) (bp->common.chip_id & CHIP_REV_MASK) argument
836 #define CHIP_REV_IS_SLOW(bp) (CHIP_REV_VAL(bp) > 0x00005000) argument
838 #define CHIP_REV_IS_EMUL(bp) ((CHIP_REV_IS_SLOW(bp)) && \ argument
841 #define CHIP_REV_IS_FPGA(bp) ((CHIP_REV_IS_SLOW(bp)) && \ argument
844 #define CHIP_TIME(bp) ((CHIP_REV_IS_EMUL(bp)) ? 2000 : \ argument
847 #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) argument
848 #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) argument
849 #define CHIP_REV_SIM(bp) (((CHIP_REV_MASK - CHIP_REV_VAL(bp)) >>\ argument
852 #define CHIP_REV(bp) (CHIP_REV_IS_SLOW(bp) ? \ argument
855 #define CHIP_IS_E3B0(bp) (CHIP_IS_E3(bp) && \ argument
857 #define CHIP_IS_E3A0(bp) (CHIP_IS_E3(bp) && \ argument
879 #define CHIP_INT_MODE_IS_NBC(bp) \ argument
882 #define CHIP_INT_MODE_IS_BC(bp) (!CHIP_INT_MODE_IS_NBC(bp)) argument
888 #define CHIP_MODE(bp) (bp->common.chip_port_mode) argument
889 #define CHIP_MODE_IS_4_PORT(bp) (CHIP_MODE(bp) == CHIP_4_PORT_MODE) argument
1057 #define bnx2x_sp(bp, var) (&bp->slowpath->var) argument
1058 #define bnx2x_sp_mapping(bp, var) \ argument
1173 #define BP_PATH(bp) (CHIP_IS_E1x(bp) ? 0 : (bp->pf_num & 1)) argument
1174 #define BP_PORT(bp) (bp->pfid & 1) argument
1175 #define BP_FUNC(bp) (bp->pfid) argument
1176 #define BP_ABS_FUNC(bp) (bp->pf_num) argument
1177 #define BP_VN(bp) ((bp)->pfid >> 1) argument
1178 #define BP_MAX_VN_NUM(bp) (CHIP_MODE_IS_4_PORT(bp) ? 2 : 4) argument
1179 #define BP_L_ID(bp) (BP_VN(bp) << 2) argument
1180 #define BP_FW_MB_IDX_VN(bp, vn) (BP_PORT(bp) +\ argument
1182 #define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp)) argument
1270 #define BP_NOMCP(bp) (bp->flags & NO_MCP_FLAG) argument
1278 #define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG) argument
1279 #define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG) argument
1280 #define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) argument
1313 #define IS_MF(bp) (bp->mf_mode != 0) argument
1314 #define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) argument
1315 #define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) argument
1398 #define BP_ILT(bp) ((bp)->ilt) argument
1404 #define BNX2X_MAX_RSS_COUNT(bp) ((bp)->igu_sb_cnt - CNIC_PRESENT) argument
1410 #define BNX2X_L2_CID_COUNT(bp) (MAX_TXQS_PER_COS * BNX2X_MULTI_TX_COS +\ argument
1412 #define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ argument
1414 #define BNX2X_DB_SIZE(bp) (BNX2X_L2_CID_COUNT(bp) * (1 << BNX2X_DB_SHIFT)) argument
1470 #define GUNZIP_BUF(bp) (bp->gunzip_buf) argument
1471 #define GUNZIP_PHYS(bp) (bp->gunzip_mapping) argument
1472 #define GUNZIP_OUTLEN(bp) (bp->gunzip_outlen) argument
1480 #define INIT_MODE_FLAGS(bp) (bp->init_mode_flags) argument
1490 #define INIT_OPS(bp) (bp->init_ops) argument
1491 #define INIT_OPS_OFFSETS(bp) (bp->init_ops_offsets) argument
1492 #define INIT_DATA(bp) (bp->init_data) argument
1493 #define INIT_TSEM_INT_TABLE_DATA(bp) (bp->tsem_int_table_data) argument
1494 #define INIT_TSEM_PRAM_DATA(bp) (bp->tsem_pram_data) argument
1495 #define INIT_USEM_INT_TABLE_DATA(bp) (bp->usem_int_table_data) argument
1496 #define INIT_USEM_PRAM_DATA(bp) (bp->usem_pram_data) argument
1497 #define INIT_XSEM_INT_TABLE_DATA(bp) (bp->xsem_int_table_data) argument
1498 #define INIT_XSEM_PRAM_DATA(bp) (bp->xsem_pram_data) argument
1499 #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) argument
1500 #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) argument
1563 #define BNX2X_NUM_QUEUES(bp) (bp->num_queues) argument
1564 #define BNX2X_NUM_ETH_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - NON_ETH_CONTEXT_USE) argument
1565 #define BNX2X_NUM_RX_QUEUES(bp) BNX2X_NUM_QUEUES(bp) argument
1567 #define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) argument
1569 #define BNX2X_MAX_QUEUES(bp) BNX2X_MAX_RSS_COUNT(bp) argument
1604 #define for_each_eth_queue(bp, var) \ argument
1607 #define for_each_nondefault_eth_queue(bp, var) \ argument
1610 #define for_each_queue(bp, var) \ argument
1617 #define for_each_rx_queue(bp, var) \ argument
1624 #define for_each_tx_queue(bp, var) \ argument
1630 #define for_each_nondefault_queue(bp, var) \ argument
1642 #define skip_rx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
1647 #define skip_tx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
1649 #define skip_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
1728 static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, in reg_poll()
1849 #define DMAE_LEN32_WR_MAX(bp) (CHIP_IS_E1(bp) ? 0x400 : 0x2000) argument
1855 #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ argument
1857 #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ argument
1881 #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ argument
2061 #define MC_HASH_OFFSET(bp, i) (BAR_TSTRORM_INTMEM + \ argument
2097 #define BNX2X_MF_PROTOCOL(bp) \ argument
2101 #define BNX2X_IS_MF_PROTOCOL_ISCSI(bp) \ argument
2104 #define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_PROTOCOL_ISCSI(bp)) argument