Lines Matching full:state
210 static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, co…
211 static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, c…
235 static u16 dib9000_read16_attr(struct dib9000_state *state, u16 reg, u8 * b, u32 len, u16 attribute) in dib9000_read16_attr() argument
241 if (state->platform.risc.fw_is_running && (reg < 1024)) in dib9000_read16_attr()
242 return dib9000_risc_apb_access_read(state, reg, attribute, NULL, 0, b, len); in dib9000_read16_attr()
244 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib9000_read16_attr()
245 state->msg[0].addr = state->i2c.i2c_addr >> 1; in dib9000_read16_attr()
246 state->msg[0].flags = 0; in dib9000_read16_attr()
247 state->msg[0].buf = state->i2c_write_buffer; in dib9000_read16_attr()
248 state->msg[0].len = 2; in dib9000_read16_attr()
249 state->msg[1].addr = state->i2c.i2c_addr >> 1; in dib9000_read16_attr()
250 state->msg[1].flags = I2C_M_RD; in dib9000_read16_attr()
251 state->msg[1].buf = b; in dib9000_read16_attr()
252 state->msg[1].len = len; in dib9000_read16_attr()
254 state->i2c_write_buffer[0] = reg >> 8; in dib9000_read16_attr()
255 state->i2c_write_buffer[1] = reg & 0xff; in dib9000_read16_attr()
258 state->i2c_write_buffer[0] |= (1 << 5); in dib9000_read16_attr()
260 state->i2c_write_buffer[0] |= (1 << 4); in dib9000_read16_attr()
264 state->msg[1].len = l; in dib9000_read16_attr()
265 state->msg[1].buf = b; in dib9000_read16_attr()
266 ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 2) != 2 ? -EREMOTEIO : 0; in dib9000_read16_attr()
302 static inline u16 dib9000_read_word(struct dib9000_state *state, u16 reg) in dib9000_read_word() argument
304 if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2, 0) != 0) in dib9000_read_word()
306 return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1]; in dib9000_read_word()
309 static inline u16 dib9000_read_word_attr(struct dib9000_state *state, u16 reg, u16 attribute) in dib9000_read_word_attr() argument
311 if (dib9000_read16_attr(state, reg, state->i2c_read_buffer, 2, in dib9000_read_word_attr()
314 return (state->i2c_read_buffer[0] << 8) | state->i2c_read_buffer[1]; in dib9000_read_word_attr()
317 #define dib9000_read16_noinc_attr(state, reg, b, len, attribute) dib9000_read16_attr(state, reg, b,… argument
319 static u16 dib9000_write16_attr(struct dib9000_state *state, u16 reg, const u8 * buf, u32 len, u16 … in dib9000_write16_attr() argument
325 if (state->platform.risc.fw_is_running && (reg < 1024)) { in dib9000_write16_attr()
327 …(state, reg, DATA_BUS_ACCESS_MODE_16BIT | DATA_BUS_ACCESS_MODE_NO_ADDRESS_INCREMENT | attribute, b… in dib9000_write16_attr()
332 memset(&state->msg[0], 0, sizeof(struct i2c_msg)); in dib9000_write16_attr()
333 state->msg[0].addr = state->i2c.i2c_addr >> 1; in dib9000_write16_attr()
334 state->msg[0].flags = 0; in dib9000_write16_attr()
335 state->msg[0].buf = state->i2c_write_buffer; in dib9000_write16_attr()
336 state->msg[0].len = len + 2; in dib9000_write16_attr()
338 state->i2c_write_buffer[0] = (reg >> 8) & 0xff; in dib9000_write16_attr()
339 state->i2c_write_buffer[1] = (reg) & 0xff; in dib9000_write16_attr()
342 state->i2c_write_buffer[0] |= (1 << 5); in dib9000_write16_attr()
344 state->i2c_write_buffer[0] |= (1 << 4); in dib9000_write16_attr()
348 state->msg[0].len = l + 2; in dib9000_write16_attr()
349 memcpy(&state->i2c_write_buffer[2], buf, l); in dib9000_write16_attr()
351 ret = i2c_transfer(state->i2c.i2c_adap, state->msg, 1) != 1 ? -EREMOTEIO : 0; in dib9000_write16_attr()
378 static inline int dib9000_write_word(struct dib9000_state *state, u16 reg, u16 val) in dib9000_write_word() argument
381 return dib9000_write16_attr(state, reg, b, 2, 0); in dib9000_write_word()
384 static inline int dib9000_write_word_attr(struct dib9000_state *state, u16 reg, u16 val, u16 attrib… in dib9000_write_word_attr() argument
387 return dib9000_write16_attr(state, reg, b, 2, attribute); in dib9000_write_word_attr()
390 #define dib9000_write(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, 0) argument
391 #define dib9000_write16_noinc(state, reg, buf, len) dib9000_write16_attr(state, reg, buf, len, DATA… argument
392 #define dib9000_write16_noinc_attr(state, reg, buf, len, attribute) dib9000_write16_attr(state, reg… argument
394 #define dib9000_mbx_send(state, id, data, len) dib9000_mbx_send_attr(state, id, data, len, 0) argument
395 #define dib9000_mbx_get_message(state, id, msg, len) dib9000_mbx_get_message_attr(state, id, msg, l… argument
400 #define dib9000_risc_mem_read_chunks(state, b, len) dib9000_read16_attr(state, 1063, b, len, DATA_B… argument
401 #define dib9000_risc_mem_write_chunks(state, buf, len) dib9000_write16_attr(state, 1063, buf, len, … argument
403 static void dib9000_risc_mem_setup_cmd(struct dib9000_state *state, u32 addr, u32 len, u8 reading) in dib9000_risc_mem_setup_cmd() argument
407 /* dprintk("%d memcmd: %d %d %d\n", state->fe_id, addr, addr+len, len); */ in dib9000_risc_mem_setup_cmd()
427 dib9000_write(state, 1056, b, 14); in dib9000_risc_mem_setup_cmd()
429 dib9000_write_word(state, 1056, (1 << 15) | 1); in dib9000_risc_mem_setup_cmd()
430 …state->platform.risc.memcmd = -1; /* if it was called directly reset it - to force a future setup-… in dib9000_risc_mem_setup_cmd()
433 static void dib9000_risc_mem_setup(struct dib9000_state *state, u8 cmd) in dib9000_risc_mem_setup() argument
435 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd & 0x7f]; in dib9000_risc_mem_setup()
437 if (state->platform.risc.memcmd == cmd && /* same command */ in dib9000_risc_mem_setup()
440 dib9000_risc_mem_setup_cmd(state, m->addr, m->size, cmd & 0x80); in dib9000_risc_mem_setup()
441 state->platform.risc.memcmd = cmd; in dib9000_risc_mem_setup()
444 static int dib9000_risc_mem_read(struct dib9000_state *state, u8 cmd, u8 * b, u16 len) in dib9000_risc_mem_read() argument
446 if (!state->platform.risc.fw_is_running) in dib9000_risc_mem_read()
449 DibAcquireLock(&state->platform.risc.mem_lock); in dib9000_risc_mem_read()
450 dib9000_risc_mem_setup(state, cmd | 0x80); in dib9000_risc_mem_read()
451 dib9000_risc_mem_read_chunks(state, b, len); in dib9000_risc_mem_read()
452 DibReleaseLock(&state->platform.risc.mem_lock); in dib9000_risc_mem_read()
456 static int dib9000_risc_mem_write(struct dib9000_state *state, u8 cmd, const u8 * b) in dib9000_risc_mem_write() argument
458 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[cmd]; in dib9000_risc_mem_write()
459 if (!state->platform.risc.fw_is_running) in dib9000_risc_mem_write()
462 DibAcquireLock(&state->platform.risc.mem_lock); in dib9000_risc_mem_write()
463 dib9000_risc_mem_setup(state, cmd); in dib9000_risc_mem_write()
464 dib9000_risc_mem_write_chunks(state, b, m->size); in dib9000_risc_mem_write()
465 DibReleaseLock(&state->platform.risc.mem_lock); in dib9000_risc_mem_write()
469 static int dib9000_firmware_download(struct dib9000_state *state, u8 risc_id, u16 key, const u8 * c… in dib9000_firmware_download() argument
479 dib9000_write_word(state, 1024 + offs, 0x000f); in dib9000_firmware_download()
480 dib9000_write_word(state, 1025 + offs, 0); in dib9000_firmware_download()
481 dib9000_write_word(state, 1031 + offs, key); in dib9000_firmware_download()
484 if (dib9000_write16_noinc(state, 1026 + offs, (u8 *) code, (u16) len) != 0) { in dib9000_firmware_download()
494 static int dib9000_mbx_host_init(struct dib9000_state *state, u8 risc_id) in dib9000_mbx_host_init() argument
506 dib9000_write_word(state, 1027 + mbox_offs, 0x8000); in dib9000_mbx_host_init()
510 reset_reg = dib9000_read_word(state, 1027 + mbox_offs); in dib9000_mbx_host_init()
523 static int dib9000_mbx_send_attr(struct dib9000_state *state, u8 id, u16 * data, u8 len, u16 attr) in dib9000_mbx_send_attr() argument
531 if (!state->platform.risc.fw_is_running) in dib9000_mbx_send_attr()
534 DibAcquireLock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_send_attr()
537 size = dib9000_read_word_attr(state, 1043, attr) & 0xff; in dib9000_mbx_send_attr()
569 …if (dib9000_write16_noinc_attr(state, 1045, b, 2, attr) != 0 || dib9000_write16_noinc_attr(state, … in dib9000_mbx_send_attr()
575 ret = (u8) dib9000_write_word_attr(state, 1043, 1 << 14, attr); in dib9000_mbx_send_attr()
578 DibReleaseLock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_send_attr()
583 static u8 dib9000_mbx_read(struct dib9000_state *state, u16 * data, u8 risc_id, u16 attr) in dib9000_mbx_read() argument
593 if (!state->platform.risc.fw_is_running) in dib9000_mbx_read()
596 DibAcquireLock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_read()
603 *data = dib9000_read_word_attr(state, 1029 + mc_base, attr); in dib9000_mbx_read()
610 dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, size * 2, attr); in dib9000_mbx_read()
629 dib9000_read16_noinc_attr(state, 1029 + mc_base, (u8 *) data, 2, attr); in dib9000_mbx_read()
632 dib9000_write_word_attr(state, 1028 + mc_base, 1 << 14, attr); in dib9000_mbx_read()
634 DibReleaseLock(&state->platform.risc.mbx_if_lock); in dib9000_mbx_read()
639 static int dib9000_risc_debug_buf(struct dib9000_state *state, u16 * data, u8 size) in dib9000_risc_debug_buf() argument
649 dprintk("RISC%d: %d.%04d %s", state->fe_id, ts / 10000, ts % 10000, *b ? b : "<emtpy>"); in dib9000_risc_debug_buf()
653 static int dib9000_mbx_fetch_to_cache(struct dib9000_state *state, u16 attr) in dib9000_mbx_fetch_to_cache() argument
660 block = state->platform.risc.message_cache[i]; in dib9000_mbx_fetch_to_cache()
662 size = dib9000_mbx_read(state, block, 1, attr); in dib9000_mbx_fetch_to_cache()
668 …dib9000_risc_debug_buf(state, block + 1, size); /* debug-messages are going to be printed right aw… in dib9000_mbx_fetch_to_cache()
673 dib9000_risc_data_process(state, block + 1, size); in dib9000_mbx_fetch_to_cache()
688 static u8 dib9000_mbx_count(struct dib9000_state *state, u8 risc_id, u16 attr) in dib9000_mbx_count() argument
691 return (u8) (dib9000_read_word_attr(state, 1028, attr) >> 10) & 0x1f; /* 5 bit field */ in dib9000_mbx_count()
693 return (u8) (dib9000_read_word_attr(state, 1044, attr) >> 8) & 0x7f; /* 7 bit field */ in dib9000_mbx_count()
696 static int dib9000_mbx_process(struct dib9000_state *state, u16 attr) in dib9000_mbx_process() argument
701 if (!state->platform.risc.fw_is_running) in dib9000_mbx_process()
704 DibAcquireLock(&state->platform.risc.mbx_lock); in dib9000_mbx_process()
706 if (dib9000_mbx_count(state, 1, attr)) /* 1=RiscB */ in dib9000_mbx_process()
707 ret = dib9000_mbx_fetch_to_cache(state, attr); in dib9000_mbx_process()
709 tmp = dib9000_read_word_attr(state, 1229, attr); /* Clear the IRQ */ in dib9000_mbx_process()
712 DibReleaseLock(&state->platform.risc.mbx_lock); in dib9000_mbx_process()
717 static int dib9000_mbx_get_message_attr(struct dib9000_state *state, u16 id, u16 * msg, u8 * size, … in dib9000_mbx_get_message_attr() argument
727 block = state->platform.risc.message_cache[i]; in dib9000_mbx_get_message_attr()
740 if (dib9000_mbx_process(state, attr) == -1) /* try to fetch one message - if any */ in dib9000_mbx_get_message_attr()
753 static int dib9000_risc_check_version(struct dib9000_state *state) in dib9000_risc_check_version() argument
759 if (dib9000_mbx_send(state, OUT_MSG_REQ_VERSION, &fw_version, 1) != 0) in dib9000_risc_check_version()
762 if (dib9000_mbx_get_message(state, IN_MSG_VERSION, (u16 *) r, &size) < 0) in dib9000_risc_check_version()
788 static int dib9000_fw_boot(struct dib9000_state *state, const u8 * codeA, u32 lenA, const u8 * code… in dib9000_fw_boot() argument
791 dib9000_write_word(state, 1225, 0x02); /* A: 8k C, 4 k D - B: 32k C 6 k D - IRAM 96k */ in dib9000_fw_boot()
792 dib9000_write_word(state, 1226, 0x05); in dib9000_fw_boot()
795 dib9000_write_word(state, 1542, 1); in dib9000_fw_boot()
798 dib9000_write_word(state, 1074, 0); in dib9000_fw_boot()
799 dib9000_write_word(state, 1075, 0); in dib9000_fw_boot()
802 dib9000_write_word(state, 1237, 0); in dib9000_fw_boot()
806 dib9000_write_word(state, 1024, 2); in dib9000_fw_boot()
808 dib9000_write_word(state, 1024, 15); in dib9000_fw_boot()
810 dib9000_write_word(state, 1040, 2); in dib9000_fw_boot()
813 dib9000_firmware_download(state, 0, 0x1234, codeA, lenA); in dib9000_fw_boot()
815 dib9000_firmware_download(state, 1, 0x1234, codeB, lenB); in dib9000_fw_boot()
819 dib9000_write_word(state, 1024, 0); in dib9000_fw_boot()
821 dib9000_write_word(state, 1040, 0); in dib9000_fw_boot()
824 if (dib9000_mbx_host_init(state, 0) != 0) in dib9000_fw_boot()
827 if (dib9000_mbx_host_init(state, 1) != 0) in dib9000_fw_boot()
831 state->platform.risc.fw_is_running = 1; in dib9000_fw_boot()
833 if (dib9000_risc_check_version(state) != 0) in dib9000_fw_boot()
836 state->platform.risc.memcmd = 0xff; in dib9000_fw_boot()
886 static void dib9000_set_power_mode(struct dib9000_state *state, enum dib9000_power_mode mode) in dib9000_set_power_mode() argument
892 if (state->revision == 0x4003 || state->revision == 0x4004 || state->revision == 0x4005) in dib9000_set_power_mode()
897 reg_906 = dib9000_read_word(state, 906 + offset) | 0x3; /* keep settings for RISC */ in dib9000_set_power_mode()
939 if (!state->platform.host.mobile_mode) in dib9000_set_power_mode()
943 if (state->revision != 0x4000) in dib9000_set_power_mode()
946 dib9000_write_word(state, 903 + offset, reg_903); in dib9000_set_power_mode()
947 dib9000_write_word(state, 904 + offset, reg_904); in dib9000_set_power_mode()
948 dib9000_write_word(state, 905 + offset, reg_905); in dib9000_set_power_mode()
949 dib9000_write_word(state, 906 + offset, reg_906); in dib9000_set_power_mode()
954 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_reset() local
956 dib9000_write_word(state, 1817, 0x0003); in dib9000_fw_reset()
958 dib9000_write_word(state, 1227, 1); in dib9000_fw_reset()
959 dib9000_write_word(state, 1227, 0); in dib9000_fw_reset()
961 switch ((state->revision = dib9000_identify(&state->i2c))) { in dib9000_fw_reset()
965 state->reg_offs = 1; in dib9000_fw_reset()
972 dibx000_reset_i2c_master(&state->i2c_master); in dib9000_fw_reset()
974 dib9000_set_power_mode(state, DIB9000_POWER_ALL); in dib9000_fw_reset()
977 dib9000_write_word(state, 1794, dib9000_read_word(state, 1794) & ~(1 << 1)); in dib9000_fw_reset()
978 dib9000_write_word(state, 1796, 0); in dib9000_fw_reset()
979 dib9000_write_word(state, 1805, 0x805); in dib9000_fw_reset()
982 dib9000_write_word(state, 898, 0xffff); in dib9000_fw_reset()
983 dib9000_write_word(state, 899, 0xffff); in dib9000_fw_reset()
984 dib9000_write_word(state, 900, 0x0001); in dib9000_fw_reset()
985 dib9000_write_word(state, 901, 0xff19); in dib9000_fw_reset()
986 dib9000_write_word(state, 902, 0x003c); in dib9000_fw_reset()
988 dib9000_write_word(state, 898, 0); in dib9000_fw_reset()
989 dib9000_write_word(state, 899, 0); in dib9000_fw_reset()
990 dib9000_write_word(state, 900, 0); in dib9000_fw_reset()
991 dib9000_write_word(state, 901, 0); in dib9000_fw_reset()
992 dib9000_write_word(state, 902, 0); in dib9000_fw_reset()
994 dib9000_write_word(state, 911, state->chip.d9.cfg.if_drives); in dib9000_fw_reset()
996 dib9000_set_power_mode(state, DIB9000_POWER_INTERFACE_ONLY); in dib9000_fw_reset()
1001 static int dib9000_risc_apb_access_read(struct dib9000_state *state, u32 address, u16 attribute, co… in dib9000_risc_apb_access_read() argument
1006 if (address >= 1024 || !state->platform.risc.fw_is_running) in dib9000_risc_apb_access_read()
1013 dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_R, mb, 2, attribute); in dib9000_risc_apb_access_read()
1014 switch (dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute)) { in dib9000_risc_apb_access_read()
1028 static int dib9000_risc_apb_access_write(struct dib9000_state *state, u32 address, u16 attribute, c… in dib9000_risc_apb_access_write() argument
1033 if (address >= 1024 || !state->platform.risc.fw_is_running) in dib9000_risc_apb_access_write()
1042 dib9000_mbx_send_attr(state, OUT_MSG_BRIDGE_APB_W, mb, 1 + len / 2, attribute); in dib9000_risc_apb_access_write()
1043 …return dib9000_mbx_get_message_attr(state, IN_MSG_END_BRIDGE_APB_RW, mb, &s, attribute) == 1 ? 0 :… in dib9000_risc_apb_access_write()
1046 static int dib9000_fw_memmbx_sync(struct dib9000_state *state, u8 i) in dib9000_fw_memmbx_sync() argument
1050 if (!state->platform.risc.fw_is_running) in dib9000_fw_memmbx_sync()
1052 dib9000_risc_mem_write(state, FE_MM_RW_SYNC, &i); in dib9000_fw_memmbx_sync()
1054 dib9000_risc_mem_read(state, FE_MM_RW_SYNC, state->i2c_read_buffer, 1); in dib9000_fw_memmbx_sync()
1055 } while (state->i2c_read_buffer[0] && index_loop--); in dib9000_fw_memmbx_sync()
1062 static int dib9000_fw_init(struct dib9000_state *state) in dib9000_fw_init() argument
1069 …if (dib9000_fw_boot(state, NULL, 0, state->chip.d9.cfg.microcode_B_fe_buffer, state->chip.d9.cfg.m… in dib9000_fw_init()
1073 for (i = 0; i < ARRAY_SIZE(state->chip.d9.cfg.gpio_function); i++) { in dib9000_fw_init()
1074 f = &state->chip.d9.cfg.gpio_function[i]; in dib9000_fw_init()
1090 if (dib9000_mbx_send(state, OUT_MSG_CONF_GPIO, b, 15) != 0) in dib9000_fw_init()
1094 b[0] = state->chip.d9.cfg.subband.size; /* type == 0 -> GPIO - PWM not yet supported */ in dib9000_fw_init()
1095 for (i = 0; i < state->chip.d9.cfg.subband.size; i++) { in dib9000_fw_init()
1096 b[1 + i * 4] = state->chip.d9.cfg.subband.subband[i].f_mhz; in dib9000_fw_init()
1097 b[2 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.mask; in dib9000_fw_init()
1098 b[3 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.direction; in dib9000_fw_init()
1099 b[4 + i * 4] = (u16) state->chip.d9.cfg.subband.subband[i].gpio.value; in dib9000_fw_init()
1102 if (dib9000_mbx_send(state, OUT_MSG_SUBBAND_SEL, b, 2 + 4 * i) != 0) in dib9000_fw_init()
1109 b[2] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000) >> 16) & 0xffff); in dib9000_fw_init()
1110 b[3] = (u16) (((state->chip.d9.cfg.xtal_clock_khz * 1000)) & 0xffff); in dib9000_fw_init()
1111 b[4] = (u16) ((state->chip.d9.cfg.vcxo_timer >> 16) & 0xffff); in dib9000_fw_init()
1112 b[5] = (u16) ((state->chip.d9.cfg.vcxo_timer) & 0xffff); in dib9000_fw_init()
1113 b[6] = (u16) ((state->chip.d9.cfg.timing_frequency >> 16) & 0xffff); in dib9000_fw_init()
1114 b[7] = (u16) ((state->chip.d9.cfg.timing_frequency) & 0xffff); in dib9000_fw_init()
1115 b[29] = state->chip.d9.cfg.if_drives; in dib9000_fw_init()
1116 if (dib9000_mbx_send(state, OUT_MSG_INIT_DEMOD, b, ARRAY_SIZE(b)) != 0) in dib9000_fw_init()
1119 if (dib9000_mbx_send(state, OUT_MSG_FE_FW_DL, NULL, 0) != 0) in dib9000_fw_init()
1122 if (dib9000_mbx_get_message(state, IN_MSG_FE_FW_DL_DONE, b, &size) < 0) in dib9000_fw_init()
1132 state->platform.risc.fe_mm[i / 2].addr = b[i + 0]; in dib9000_fw_init()
1133 state->platform.risc.fe_mm[i / 2].size = b[i + 1]; in dib9000_fw_init()
1139 static void dib9000_fw_set_channel_head(struct dib9000_state *state) in dib9000_fw_set_channel_head() argument
1142 u32 freq = state->fe[0]->dtv_property_cache.frequency / 1000; in dib9000_fw_set_channel_head()
1143 if (state->fe_id % 2) in dib9000_fw_set_channel_head()
1150 b[4] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 0) & 0xff); in dib9000_fw_set_channel_head()
1151 b[5] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 8) & 0xff); in dib9000_fw_set_channel_head()
1152 b[6] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 16) & 0xff); in dib9000_fw_set_channel_head()
1153 b[7] = (u8) ((state->fe[0]->dtv_property_cache.bandwidth_hz / 1000 >> 24) & 0xff); in dib9000_fw_set_channel_head()
1155 if (state->fe[0]->dtv_property_cache.delivery_system == SYS_DVBT) in dib9000_fw_set_channel_head()
1157 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b); in dib9000_fw_set_channel_head()
1162 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_get_channel() local
1181 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_get_channel()
1182 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_fw_get_channel()
1187 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_UNION, in dib9000_fw_get_channel()
1188 state->i2c_read_buffer, sizeof(struct dibDVBTChannel)); in dib9000_fw_get_channel()
1189 ch = (struct dibDVBTChannel *)state->i2c_read_buffer; in dib9000_fw_get_channel()
1194 state->fe[0]->dtv_property_cache.inversion = INVERSION_ON; in dib9000_fw_get_channel()
1197 state->fe[0]->dtv_property_cache.inversion = INVERSION_OFF; in dib9000_fw_get_channel()
1201 state->fe[0]->dtv_property_cache.inversion = INVERSION_AUTO; in dib9000_fw_get_channel()
1206 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_2K; in dib9000_fw_get_channel()
1209 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_4K; in dib9000_fw_get_channel()
1212 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_8K; in dib9000_fw_get_channel()
1216 state->fe[0]->dtv_property_cache.transmission_mode = TRANSMISSION_MODE_AUTO; in dib9000_fw_get_channel()
1221 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_32; in dib9000_fw_get_channel()
1224 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_16; in dib9000_fw_get_channel()
1227 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_8; in dib9000_fw_get_channel()
1230 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_1_4; in dib9000_fw_get_channel()
1234 state->fe[0]->dtv_property_cache.guard_interval = GUARD_INTERVAL_AUTO; in dib9000_fw_get_channel()
1239 state->fe[0]->dtv_property_cache.modulation = QAM_64; in dib9000_fw_get_channel()
1242 state->fe[0]->dtv_property_cache.modulation = QAM_16; in dib9000_fw_get_channel()
1245 state->fe[0]->dtv_property_cache.modulation = QPSK; in dib9000_fw_get_channel()
1249 state->fe[0]->dtv_property_cache.modulation = QAM_AUTO; in dib9000_fw_get_channel()
1254 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_NONE; in dib9000_fw_get_channel()
1257 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_1; in dib9000_fw_get_channel()
1261 state->fe[0]->dtv_property_cache.hierarchy = HIERARCHY_AUTO; in dib9000_fw_get_channel()
1266 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_1_2; in dib9000_fw_get_channel()
1269 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_2_3; in dib9000_fw_get_channel()
1272 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_3_4; in dib9000_fw_get_channel()
1275 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_5_6; in dib9000_fw_get_channel()
1278 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_7_8; in dib9000_fw_get_channel()
1282 state->fe[0]->dtv_property_cache.code_rate_HP = FEC_AUTO; in dib9000_fw_get_channel()
1287 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_1_2; in dib9000_fw_get_channel()
1290 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_2_3; in dib9000_fw_get_channel()
1293 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_3_4; in dib9000_fw_get_channel()
1296 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_5_6; in dib9000_fw_get_channel()
1299 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_7_8; in dib9000_fw_get_channel()
1303 state->fe[0]->dtv_property_cache.code_rate_LP = FEC_AUTO; in dib9000_fw_get_channel()
1308 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_get_channel()
1314 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_channel_union() local
1332 switch (state->fe[0]->dtv_property_cache.inversion) { in dib9000_fw_set_channel_union()
1344 switch (state->fe[0]->dtv_property_cache.transmission_mode) { in dib9000_fw_set_channel_union()
1359 switch (state->fe[0]->dtv_property_cache.guard_interval) { in dib9000_fw_set_channel_union()
1377 switch (state->fe[0]->dtv_property_cache.modulation) { in dib9000_fw_set_channel_union()
1392 switch (state->fe[0]->dtv_property_cache.hierarchy) { in dib9000_fw_set_channel_union()
1407 switch (state->fe[0]->dtv_property_cache.code_rate_HP) { in dib9000_fw_set_channel_union()
1428 switch (state->fe[0]->dtv_property_cache.code_rate_LP) { in dib9000_fw_set_channel_union()
1452 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_UNION, (u8 *) &ch); in dib9000_fw_set_channel_union()
1459 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_tune() local
1460 int ret = 10, search = state->channel_status.status == CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_fw_tune()
1463 switch (state->tune_state) { in dib9000_fw_tune()
1465 dib9000_fw_set_channel_head(state); in dib9000_fw_tune()
1468 dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info); in dib9000_fw_tune()
1469 dib9000_risc_mem_write(state, FE_MM_W_FE_INFO, (u8 *) fe_info); in dib9000_fw_tune()
1472 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_SEARCH, NULL, 0); in dib9000_fw_tune()
1475 dib9000_mbx_send(state, OUT_MSG_FE_CHANNEL_TUNE, NULL, 0); in dib9000_fw_tune()
1477 state->tune_state = CT_DEMOD_STEP_1; in dib9000_fw_tune()
1481 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_SEARCH_STATE, state->i2c_read_buffer, 1); in dib9000_fw_tune()
1483 dib9000_risc_mem_read(state, FE_MM_R_CHANNEL_TUNE_STATE, state->i2c_read_buffer, 1); in dib9000_fw_tune()
1484 i = (s8)state->i2c_read_buffer[0]; in dib9000_fw_tune()
1490 state->status = FE_STATUS_DEMOD_SUCCESS; in dib9000_fw_tune()
1492 state->tune_state = CT_DEMOD_STOP; in dib9000_fw_tune()
1493 state->status = FE_STATUS_LOCKED; in dib9000_fw_tune()
1497 state->status = FE_STATUS_TUNE_FAILED; in dib9000_fw_tune()
1498 state->tune_state = CT_DEMOD_STOP; in dib9000_fw_tune()
1512 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_diversity_in() local
1514 return dib9000_mbx_send(state, OUT_MSG_ENABLE_DIVERSITY, &mode, 1); in dib9000_fw_set_diversity_in()
1519 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_output_mode() local
1544 dprintk("Unhandled output_mode passed to be set for demod %p", &state->fe[0]); in dib9000_fw_set_output_mode()
1548 dib9000_write_word(state, 1795, outreg); in dib9000_fw_set_output_mode()
1555 smo_mode = (dib9000_read_word(state, 295) & 0x0010) | (1 << 1); in dib9000_fw_set_output_mode()
1556 if (state->chip.d9.cfg.output_mpeg2_in_188_bytes) in dib9000_fw_set_output_mode()
1558 dib9000_write_word(state, 295, smo_mode); in dib9000_fw_set_output_mode()
1563 return dib9000_mbx_send(state, OUT_MSG_SET_OUTPUT_MODE, &outreg, 1); in dib9000_fw_set_output_mode()
1568 struct dib9000_state *state = i2c_get_adapdata(i2c_adap); in dib9000_tuner_xfer() local
1577 if (dib9000_read_word(state, 790) != 0) in dib9000_tuner_xfer()
1580 dib9000_write_word(state, 784, (u16) (msg[index_msg].addr)); in dib9000_tuner_xfer()
1581 dib9000_write_word(state, 787, (len / 2) - 1); in dib9000_tuner_xfer()
1582 dib9000_write_word(state, 786, 1); /* start read */ in dib9000_tuner_xfer()
1585 while (dib9000_read_word(state, 790) != (len / 2) && i) in dib9000_tuner_xfer()
1592 t = dib9000_read_word(state, 785); in dib9000_tuner_xfer()
1596 if (dib9000_read_word(state, 790) != 0) in dib9000_tuner_xfer()
1600 while (dib9000_read_word(state, 789) && i) in dib9000_tuner_xfer()
1610 dib9000_write_word(state, 785, (msg[index_msg].buf[i] << 8) | msg[index_msg].buf[i + 1]); in dib9000_tuner_xfer()
1611 dib9000_write_word(state, 784, (u16) msg[index_msg].addr); in dib9000_tuner_xfer()
1612 dib9000_write_word(state, 787, (len / 2) - 1); in dib9000_tuner_xfer()
1613 dib9000_write_word(state, 786, 0); /* start write */ in dib9000_tuner_xfer()
1616 while (dib9000_read_word(state, 791) > 0 && i) in dib9000_tuner_xfer()
1627 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_set_component_bus_speed() local
1629 state->component_bus_speed = speed; in dib9000_fw_set_component_bus_speed()
1636 struct dib9000_state *state = i2c_get_adapdata(i2c_adap); in dib9000_fw_component_bus_xfer() local
1639 u16 scl = state->component_bus_speed; /* SCL frequency */ in dib9000_fw_component_bus_xfer()
1640 struct dib9000_fe_memory_map *m = &state->platform.risc.fe_mm[FE_MM_RW_COMPONENT_ACCESS_BUFFER]; in dib9000_fw_component_bus_xfer()
1663 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_component_bus_xfer()
1665 dib9000_risc_mem_write(state, FE_MM_W_COMPONENT_ACCESS, p); in dib9000_fw_component_bus_xfer()
1668 dib9000_risc_mem_setup_cmd(state, m->addr, msg[0].len, 0); in dib9000_fw_component_bus_xfer()
1669 dib9000_risc_mem_write_chunks(state, msg[0].buf, msg[0].len); in dib9000_fw_component_bus_xfer()
1673 if (dib9000_fw_memmbx_sync(state, FE_SYNC_COMPONENT_ACCESS) < 0) { in dib9000_fw_component_bus_xfer()
1674 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_component_bus_xfer()
1680 dib9000_risc_mem_read(state, FE_MM_RW_COMPONENT_ACCESS_BUFFER, msg[1].buf, msg[1].len); in dib9000_fw_component_bus_xfer()
1682 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_fw_component_bus_xfer()
1751 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_gpio() local
1752 return dib9000_cfg_gpio(state, num, dir, val); in dib9000_set_gpio()
1758 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_pid_filter_ctrl() local
1762 if ((state->pid_ctrl_index != -2) && (state->pid_ctrl_index < 9)) { in dib9000_fw_pid_filter_ctrl()
1765 state->pid_ctrl_index++; in dib9000_fw_pid_filter_ctrl()
1766 state->pid_ctrl[state->pid_ctrl_index].cmd = DIB9000_PID_FILTER_CTRL; in dib9000_fw_pid_filter_ctrl()
1767 state->pid_ctrl[state->pid_ctrl_index].onoff = onoff; in dib9000_fw_pid_filter_ctrl()
1771 DibAcquireLock(&state->demod_lock); in dib9000_fw_pid_filter_ctrl()
1773 val = dib9000_read_word(state, 294 + 1) & 0xffef; in dib9000_fw_pid_filter_ctrl()
1777 ret = dib9000_write_word(state, 294 + 1, val); in dib9000_fw_pid_filter_ctrl()
1778 DibReleaseLock(&state->demod_lock); in dib9000_fw_pid_filter_ctrl()
1786 struct dib9000_state *state = fe->demodulator_priv; in dib9000_fw_pid_filter() local
1789 if (state->pid_ctrl_index != -2) { in dib9000_fw_pid_filter()
1792 if (state->pid_ctrl_index < 9) { in dib9000_fw_pid_filter()
1793 state->pid_ctrl_index++; in dib9000_fw_pid_filter()
1794 state->pid_ctrl[state->pid_ctrl_index].cmd = DIB9000_PID_FILTER; in dib9000_fw_pid_filter()
1795 state->pid_ctrl[state->pid_ctrl_index].id = id; in dib9000_fw_pid_filter()
1796 state->pid_ctrl[state->pid_ctrl_index].pid = pid; in dib9000_fw_pid_filter()
1797 state->pid_ctrl[state->pid_ctrl_index].onoff = onoff; in dib9000_fw_pid_filter()
1803 DibAcquireLock(&state->demod_lock); in dib9000_fw_pid_filter()
1805 ret = dib9000_write_word(state, 300 + 1 + id, in dib9000_fw_pid_filter()
1807 DibReleaseLock(&state->demod_lock); in dib9000_fw_pid_filter()
1814 struct dib9000_state *state = fe->demodulator_priv; in dib9000_firmware_post_pll_init() local
1815 return dib9000_fw_init(state); in dib9000_firmware_post_pll_init()
1827 DibFreeLock(&state->platform.risc.mbx_if_lock); in dib9000_release()
1828 DibFreeLock(&state->platform.risc.mbx_lock); in dib9000_release()
1829 DibFreeLock(&state->platform.risc.mem_lock); in dib9000_release()
1830 DibFreeLock(&state->platform.risc.mem_mbx_lock); in dib9000_release()
1831 DibFreeLock(&state->demod_lock); in dib9000_release()
1847 struct dib9000_state *state = fe->demodulator_priv; in dib9000_sleep() local
1851 DibAcquireLock(&state->demod_lock); in dib9000_sleep()
1852 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_sleep()
1853 ret = state->fe[index_frontend]->ops.sleep(state->fe[index_frontend]); in dib9000_sleep()
1857 ret = dib9000_mbx_send(state, OUT_MSG_FE_SLEEP, NULL, 0); in dib9000_sleep()
1860 DibReleaseLock(&state->demod_lock); in dib9000_sleep()
1872 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_frontend() local
1877 if (state->get_frontend_internal == 0) in dib9000_get_frontend()
1878 DibAcquireLock(&state->demod_lock); in dib9000_get_frontend()
1880 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_get_frontend()
1881 state->fe[index_frontend]->ops.read_status(state->fe[index_frontend], &stat); in dib9000_get_frontend()
1886 state->fe[index_frontend]->ops.get_frontend(state->fe[index_frontend]); in dib9000_get_frontend()
1887 …for (sub_index_frontend = 0; (sub_index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[sub_inde… in dib9000_get_frontend()
1890 state->fe[sub_index_frontend]->dtv_property_cache.modulation = in dib9000_get_frontend()
1891 state->fe[index_frontend]->dtv_property_cache.modulation; in dib9000_get_frontend()
1892 state->fe[sub_index_frontend]->dtv_property_cache.inversion = in dib9000_get_frontend()
1893 state->fe[index_frontend]->dtv_property_cache.inversion; in dib9000_get_frontend()
1894 state->fe[sub_index_frontend]->dtv_property_cache.transmission_mode = in dib9000_get_frontend()
1895 state->fe[index_frontend]->dtv_property_cache.transmission_mode; in dib9000_get_frontend()
1896 state->fe[sub_index_frontend]->dtv_property_cache.guard_interval = in dib9000_get_frontend()
1897 state->fe[index_frontend]->dtv_property_cache.guard_interval; in dib9000_get_frontend()
1898 state->fe[sub_index_frontend]->dtv_property_cache.hierarchy = in dib9000_get_frontend()
1899 state->fe[index_frontend]->dtv_property_cache.hierarchy; in dib9000_get_frontend()
1900 state->fe[sub_index_frontend]->dtv_property_cache.code_rate_HP = in dib9000_get_frontend()
1901 state->fe[index_frontend]->dtv_property_cache.code_rate_HP; in dib9000_get_frontend()
1902 state->fe[sub_index_frontend]->dtv_property_cache.code_rate_LP = in dib9000_get_frontend()
1903 state->fe[index_frontend]->dtv_property_cache.code_rate_LP; in dib9000_get_frontend()
1904 state->fe[sub_index_frontend]->dtv_property_cache.rolloff = in dib9000_get_frontend()
1905 state->fe[index_frontend]->dtv_property_cache.rolloff; in dib9000_get_frontend()
1919 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_get_frontend()
1920 state->fe[index_frontend]->dtv_property_cache.inversion = fe->dtv_property_cache.inversion; in dib9000_get_frontend()
1921 …state->fe[index_frontend]->dtv_property_cache.transmission_mode = fe->dtv_property_cache.transmiss… in dib9000_get_frontend()
1922 …state->fe[index_frontend]->dtv_property_cache.guard_interval = fe->dtv_property_cache.guard_interv… in dib9000_get_frontend()
1923 state->fe[index_frontend]->dtv_property_cache.modulation = fe->dtv_property_cache.modulation; in dib9000_get_frontend()
1924 state->fe[index_frontend]->dtv_property_cache.hierarchy = fe->dtv_property_cache.hierarchy; in dib9000_get_frontend()
1925 state->fe[index_frontend]->dtv_property_cache.code_rate_HP = fe->dtv_property_cache.code_rate_HP; in dib9000_get_frontend()
1926 state->fe[index_frontend]->dtv_property_cache.code_rate_LP = fe->dtv_property_cache.code_rate_LP; in dib9000_get_frontend()
1927 state->fe[index_frontend]->dtv_property_cache.rolloff = fe->dtv_property_cache.rolloff; in dib9000_get_frontend()
1932 if (state->get_frontend_internal == 0) in dib9000_get_frontend()
1933 DibReleaseLock(&state->demod_lock); in dib9000_get_frontend()
1939 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_tune_state() local
1940 state->tune_state = tune_state; in dib9000_set_tune_state()
1942 state->status = FE_STATUS_TUNE_PENDING; in dib9000_set_tune_state()
1949 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_status() local
1950 return state->status; in dib9000_get_status()
1955 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_channel_status() local
1957 memcpy(&state->channel_status, channel_status, sizeof(struct dvb_frontend_parametersContext)); in dib9000_set_channel_status()
1963 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_frontend() local
1970 if (state->fe[0]->dtv_property_cache.frequency == 0) { in dib9000_set_frontend()
1975 if (state->fe[0]->dtv_property_cache.bandwidth_hz == 0) { in dib9000_set_frontend()
1980 state->pid_ctrl_index = -1; /* postpone the pid filtering cmd */ in dib9000_set_frontend()
1981 DibAcquireLock(&state->demod_lock); in dib9000_set_frontend()
1986 if (state->fe[0]->dtv_property_cache.transmission_mode == TRANSMISSION_MODE_AUTO || in dib9000_set_frontend()
1987 state->fe[0]->dtv_property_cache.guard_interval == GUARD_INTERVAL_AUTO || in dib9000_set_frontend()
1988 state->fe[0]->dtv_property_cache.modulation == QAM_AUTO || in dib9000_set_frontend()
1989 state->fe[0]->dtv_property_cache.code_rate_HP == FEC_AUTO) { in dib9000_set_frontend()
1991 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_UNKNOWN; in dib9000_set_frontend()
1993 state->channel_status.status = CHANNEL_STATUS_PARAMETERS_SET; in dib9000_set_frontend()
1996 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
1997 dib9000_fw_set_diversity_in(state->fe[index_frontend], 1); in dib9000_set_frontend()
2000 …memcpy(&state->fe[index_frontend]->dtv_property_cache, &fe->dtv_property_cache, sizeof(struct dtv_… in dib9000_set_frontend()
2002 state->fe[index_frontend]->dtv_property_cache.delivery_system = SYS_DVBT; in dib9000_set_frontend()
2003 dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_HIGH_Z); in dib9000_set_frontend()
2005 dib9000_set_channel_status(state->fe[index_frontend], &state->channel_status); in dib9000_set_frontend()
2006 dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START); in dib9000_set_frontend()
2013 sleep_time = dib9000_fw_tune(state->fe[0]); in dib9000_set_frontend()
2014 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2015 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]); in dib9000_set_frontend()
2029 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2030 frontend_status = -dib9000_get_status(state->fe[index_frontend]); in dib9000_set_frontend()
2047 DibReleaseLock(&state->demod_lock); in dib9000_set_frontend()
2049 state->pid_ctrl_index = -1; in dib9000_set_frontend()
2056 state->get_frontend_internal = 1; in dib9000_set_frontend()
2057 dib9000_get_frontend(state->fe[0]); in dib9000_set_frontend()
2058 state->get_frontend_internal = 0; in dib9000_set_frontend()
2062 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2065 dib9000_set_channel_status(state->fe[index_frontend], &channel_status); in dib9000_set_frontend()
2066 dib9000_set_tune_state(state->fe[index_frontend], CT_DEMOD_START); in dib9000_set_frontend()
2071 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2073 sleep_time_slave = dib9000_fw_tune(state->fe[index_frontend]); in dib9000_set_frontend()
2086 …for (index_frontend = 0; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2088 frontend_status = -dib9000_get_status(state->fe[index_frontend]); in dib9000_set_frontend()
2096 dib9000_fw_set_output_mode(state->fe[0], state->chip.d9.cfg.output_mode); in dib9000_set_frontend()
2097 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_set_frontend()
2098 dib9000_fw_set_output_mode(state->fe[index_frontend], OUTMODE_DIVERSITY); in dib9000_set_frontend()
2101 dib9000_fw_set_diversity_in(state->fe[index_frontend - 1], 0); in dib9000_set_frontend()
2103 DibReleaseLock(&state->demod_lock); in dib9000_set_frontend()
2104 if (state->pid_ctrl_index >= 0) { in dib9000_set_frontend()
2106 u8 pid_ctrl_index = state->pid_ctrl_index; in dib9000_set_frontend()
2108 state->pid_ctrl_index = -2; in dib9000_set_frontend()
2112 if (state->pid_ctrl[index_pid_filter_cmd].cmd == DIB9000_PID_FILTER_CTRL) in dib9000_set_frontend()
2113 dib9000_fw_pid_filter_ctrl(state->fe[0], in dib9000_set_frontend()
2114 state->pid_ctrl[index_pid_filter_cmd].onoff); in dib9000_set_frontend()
2115 else if (state->pid_ctrl[index_pid_filter_cmd].cmd == DIB9000_PID_FILTER) in dib9000_set_frontend()
2116 dib9000_fw_pid_filter(state->fe[0], in dib9000_set_frontend()
2117 state->pid_ctrl[index_pid_filter_cmd].id, in dib9000_set_frontend()
2118 state->pid_ctrl[index_pid_filter_cmd].pid, in dib9000_set_frontend()
2119 state->pid_ctrl[index_pid_filter_cmd].onoff); in dib9000_set_frontend()
2123 state->pid_ctrl_index = -2; in dib9000_set_frontend()
2130 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_lock() local
2132 return dib9000_read_word(state, 535); in dib9000_read_lock()
2137 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_status() local
2141 DibAcquireLock(&state->demod_lock); in dib9000_read_status()
2142 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_status()
2143 lock_slave |= dib9000_read_lock(state->fe[index_frontend]); in dib9000_read_status()
2145 lock = dib9000_read_word(state, 535); in dib9000_read_status()
2160 DibReleaseLock(&state->demod_lock); in dib9000_read_status()
2167 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_ber() local
2171 DibAcquireLock(&state->demod_lock); in dib9000_read_ber()
2172 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_ber()
2173 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_ber()
2174 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_ber()
2178 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, in dib9000_read_ber()
2179 state->i2c_read_buffer, 16 * 2); in dib9000_read_ber()
2180 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_ber()
2182 c = (u16 *)state->i2c_read_buffer; in dib9000_read_ber()
2187 DibReleaseLock(&state->demod_lock); in dib9000_read_ber()
2193 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_signal_strength() local
2195 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_read_signal_strength()
2199 DibAcquireLock(&state->demod_lock); in dib9000_read_signal_strength()
2201 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_signal_strength()
2202 state->fe[index_frontend]->ops.read_signal_strength(state->fe[index_frontend], &val); in dib9000_read_signal_strength()
2209 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_signal_strength()
2210 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_signal_strength()
2214 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_read_signal_strength()
2215 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_signal_strength()
2224 DibReleaseLock(&state->demod_lock); in dib9000_read_signal_strength()
2230 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_snr() local
2231 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_get_snr()
2235 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_get_snr()
2236 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) in dib9000_get_snr()
2238 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_get_snr()
2239 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_get_snr()
2265 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_snr() local
2269 DibAcquireLock(&state->demod_lock); in dib9000_read_snr()
2271 …for (index_frontend = 1; (index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] … in dib9000_read_snr()
2272 snr_master += dib9000_get_snr(state->fe[index_frontend]); in dib9000_read_snr()
2280 DibReleaseLock(&state->demod_lock); in dib9000_read_snr()
2287 struct dib9000_state *state = fe->demodulator_priv; in dib9000_read_unc_blocks() local
2288 u16 *c = (u16 *)state->i2c_read_buffer; in dib9000_read_unc_blocks()
2291 DibAcquireLock(&state->demod_lock); in dib9000_read_unc_blocks()
2292 DibAcquireLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_unc_blocks()
2293 if (dib9000_fw_memmbx_sync(state, FE_SYNC_CHANNEL) < 0) { in dib9000_read_unc_blocks()
2297 dib9000_risc_mem_read(state, FE_MM_R_FE_MONITOR, (u8 *) c, 16 * 2); in dib9000_read_unc_blocks()
2298 DibReleaseLock(&state->platform.risc.mem_mbx_lock); in dib9000_read_unc_blocks()
2303 DibReleaseLock(&state->demod_lock); in dib9000_read_unc_blocks()
2378 struct dib9000_state *state = fe->demodulator_priv; in dib9000_set_slave_frontend() local
2381 while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL)) in dib9000_set_slave_frontend()
2385 state->fe[index_frontend] = fe_slave; in dib9000_set_slave_frontend()
2396 struct dib9000_state *state = fe->demodulator_priv; in dib9000_remove_slave_frontend() local
2399 while ((index_frontend < MAX_NUMBER_OF_FRONTENDS) && (state->fe[index_frontend] != NULL)) in dib9000_remove_slave_frontend()
2402 dprintk("remove slave fe %p (index %i)", state->fe[index_frontend - 1], index_frontend - 1); in dib9000_remove_slave_frontend()
2403 state->fe[index_frontend] = NULL; in dib9000_remove_slave_frontend()
2414 struct dib9000_state *state = fe->demodulator_priv; in dib9000_get_slave_frontend() local
2418 return state->fe[slave_index]; in dib9000_get_slave_frontend()