Lines Matching defs:qib_chip_specific

517 struct qib_chip_specific {  struct
518 	u64 __iomem *cregbase;
519 	u64 *cntrs;
520 	spinlock_t rcvmod_lock; /* protect rcvctrl shadow changes */
521 	spinlock_t gpio_lock; /* RMW of shadows/regs for ExtCtrl and GPIO */
522 	u64 main_int_mask;      /* clear bits which have dedicated handlers */
523 	u64 int_enable_mask;  /* for per port interrupts in single port mode */
524 	u64 errormask;
525 	u64 hwerrmask;
526 	u64 gpio_out; /* shadow of kr_gpio_out, for rmw ops */
527 	u64 gpio_mask; /* shadow the gpio mask register */
528 	u64 extctrl; /* shadow the gpio output enable, etc... */
529 	u32 ncntrs;
530 	u32 nportcntrs;
531 	u32 cntrnamelen;
532 	u32 portcntrnamelen;
533 	u32 numctxts;
534 	u32 rcvegrcnt;
535 	u32 updthresh; /* current AvailUpdThld */
536 	u32 updthresh_dflt; /* default AvailUpdThld */
537 	u32 r1;
538 	int irq;
539 	u32 num_msix_entries;
540 	u32 sdmabufcnt;
541 	u32 lastbuf_for_pio;
542 	u32 stay_in_freeze;
543 	u32 recovery_ports_initted;
544 	struct msix_entry *msix_entries;
545 	void  **msix_arg;
546 	unsigned long *sendchkenable;
547 	unsigned long *sendgrhchk;
548 	unsigned long *sendibchk;
549 	u32 rcvavail_timeout[18];
550 	char emsgbuf[128]; /* for device error interrupt msg buffer */