hw/qib/qib.h

18  *      - Redistributions of source code must retain the above
22  *      - Redistributions in binary form must reproduce the above
44 #include <linux/dma-mapping.h>
69  * per driver stats, either not device nor port-specific, or
79 	__u64 sps_txerrs; /* tx-related packet errors */
80 	__u64 sps_rcverrs; /* non-crc rcv packet errors */
95  * First-cut critierion for "device is active" is
97  * 5-second interval. SMA packets are 64 dwords,
104  * error-counters that are logged to EEPROM. A counter is incremented
105  * _once_ (saturating at 255) for each event with any bits set in
139 	 * in 44 bits so 32 bit programs mmap64 44 bit works)
142 	/* mmap of hdrq, must fit in 44 bits */
147 	 * number of opens (including slave sub-contexts) on this instance
157 	/* non-zero if ctxt is being shared. */
159 	/* non-zero if ctxt is being shared. */
181 	/* per-context flags for fileops/intr communication */
258 	struct qib_sge_state    *ss;  member
273  * Get/Set IB link-level config parameters for f_get/set_ib_cfg()
278 #define QIB_IB_CFG_LWID_ENB 2 /* allowed Link-width */
279 #define QIB_IB_CFG_LWID 3 /* currently active Link-width */
282 #define QIB_IB_CFG_RXPOL_ENB 6 /* Auto-RX-polarity enable */
283 #define QIB_IB_CFG_LREV_ENB 7 /* Auto-Lane-reversal enable */
287 #define QIB_IB_CFG_VL_HIGH_CAP 11 /* num of VL high priority weights */
288 #define QIB_IB_CFG_VL_LOW_CAP 12 /* num of VL low priority weights */
300  * for CFG_LSTATE: LINKCMD in upper 16 bits, LINKINITCMD in lower 16
323  * These 7 values (SDR, DDR, and QDR may be ORed for auto-speed
346  * these are bits so they can be combined, e.g.
364  * these are bits so they can be combined, e.g.
367  * be "one-shot", so do not modify shadow.
382  * These are the generic indices for requesting per-port
387 /* send-related counters */
394 /* receive-related counters */
433  * is chip-specific, per-port
506  * port-numbers are one-based. The first or only port is port1.
512 	struct qib_chippport_specific *cpspec; /* chip-specific per-port */
520 	/* QIB_POLL, etc. link-state specific flags, per port */
525 	/* number of (port-specific) interrupts for this port -- saturates... */
565 	 * Most of them are readonly, but some are write-only register,
566 	 * where we manipulate the bits in the shadow copy, and then write
569 	 * We deliberately make most of these 32 bits, since they have
577 	/* last ibcstatus.  opaque outside chip-specific code */
583 	 * the following two are 32-bit bitmasks, but {test,clear,set}_bit
586 	unsigned long p_rcvctrl; /* shadow per-port rcvctrl */
587 	unsigned long p_sendctrl; /* shadow per-port sendctrl */
618 	u8 port;        /* IB port number and index into dd->pports - 1 */
623 	u8 led_override;  /* Substituted for normal value, if non-zero */
625 	u8 led_override_vals[2]; /* Alternates per blink-frame */
659 /* device data struct now contains only "general per-device" info.
661  * described above) while fields only used by a particular chip-type are in
675 	/* mem-mapped pointer to base of chip regs */
677 	/* end of mem-mapped chip space excluding sendbuf and user regs */
684 	/* qib_pportdata, points to array of (physical) port-specific
685 	 * data structs, indexed by pidx (0..n-1)
688 	struct qib_chip_specific *cspec; /* chip-specific */
694 	/* mem-mapped pointer to base of PIO buffers (if using WC PAT) */
696 	/* mem-mapped pointer to base of user chip regs (if using WC PAT) */
710 	/* device-specific implementations of functions needed by
712 	 * really just point to a device-specific table, because we
727 	/* fill out chip-specific fields */
745 	/* Read/modify/write of GPIO pins (potentially chip-specific */
751 	 * modify rcvctrl shadow[s] and write to appropriate chip-regs.
753 	 * (ctxt == -1) means "all contexts", only meaningful for
803 	/* saturating counter of (non-port-specific) device interrupts */
871 	 * Most of them are readonly, but some are write-only register,
872 	 * where we manipulate the bits in the shadow copy, and then write
875 	 * We deliberately make most of these 32 bits, since they have
908 	 * the following two are 32-bit bitmasks, but {test,clear,set}_bit
995 	 * GPIO pins for twsi-connected devices, and device code for eeprom
1005 	/* control high-level access to EEPROM */
1015 	 * masks for which bits of errs, hwerrs that cause
1055 	int rec_cpu_num; /* for cpu affinity; -1 if none */
1088 /* clean up any per-chip chip-specific stuff */
1090 /* clean up any chip type-specific stuff */
1125 	(((struct qib_filedata *)(fp)->private_data)->rcd)
1127 	(((struct qib_filedata *)(fp)->private_data)->subctxt)
1129 	(((struct qib_filedata *)(fp)->private_data)->tidcursor)
1131 	(((struct qib_filedata *)(fp)->private_data)->pq)
1135 	return ppd->dd;  in dd_from_ppd()
1156 	unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */  in to_iport()
1158 	WARN_ON(pidx >= dd->num_pports);  in to_iport()
1159 	return &dd->pport[pidx].ibport_data;  in to_iport()
1163  * values for dd->flags (_device_ related flags) and
1183  * values for ppd->lflags (_ib_port_ related flags)
1190 /* leave a gap for more IB-link state */
1191 #define QIBL_IB_AUTONEG_INPROG 0x1000 /* non-IBTA DDR/QDR neg active */
1192 #define QIBL_IB_AUTONEG_FAILED 0x2000 /* non-IBTA DDR/QDR neg failed */
1193 #define QIBL_IB_LINK_DISABLED  0x4000 /* Linkdown-disable forced,
1197 /* IB dword length mask in PBC (lower 11 bits); same for all chips */
1198 #define QIB_PBC_LENGTH_MASK                     ((1 << 11) - 1)
1238  * any non-zero value substitutes them for the Link and LinkTrain
1252 /* ppd->sdma_lock should be locked before calling this. */
1258 	return ppd->sdma_descq_cnt -  in qib_sdma_descq_freecnt()
1259 		(ppd->sdma_descq_added - ppd->sdma_descq_removed) - 1;  in qib_sdma_descq_freecnt()
1264 	return ppd->sdma_state.current_state == qib_sdma_state_s99_running;  in __qib_sdma_running()
1283  * (2 64-byte primary cachelines for pretty much all processors of
1298 	*((u64 *) rcd->rcvhdrtail_kvaddr) = 0ULL;  in qib_clear_rcvhdrtail()
1308 		*((volatile __le64 *)rcd->rcvhdrtail_kvaddr)); /* DMA'ed */  in qib_get_rcvhdrtail()
1313 	const struct qib_devdata *dd = rcd->dd;  in qib_get_hdrqtail()
1316 	if (dd->flags & QIB_NODMA_RTAIL) {  in qib_get_hdrqtail()
1320 		rhf_addr = (__le32 *) rcd->rcvhdrq +  in qib_get_hdrqtail()
1321 			rcd->head + dd->rhf_offset;  in qib_get_hdrqtail()
1323 		hdrqtail = rcd->head;  in qib_get_hdrqtail()
1324 		if (seq == rcd->seq_cnt)  in qib_get_hdrqtail()
1367  * dma_addr wrappers - all 0's invalid for hw
1413  * allocated, or when dd->pcidev may not be valid, and at the tail end of
1427 		dev_err(&(dd)->pcidev->dev, "%s: " fmt, \
1428 			qib_get_unit_name((dd)->unit), ##__VA_ARGS__); \
1433 		dev_err(&(dd)->pcidev->dev, "%s: IB%u:%u " fmt, \
1434 			qib_get_unit_name((dd)->unit), (dd)->unit, (port), \
1440 		dev_info(&(pcidev)->dev, fmt, ##__VA_ARGS__); \