hw/nes/nes_hw.h

1055 struct nes_adapter {  struct
1056 	u64              fw_ver;
1057 	unsigned long    *allocated_qps;
1058 	unsigned long    *allocated_cqs;
1059 	unsigned long    *allocated_mrs;
1060 	unsigned long    *allocated_pds;
1061 	unsigned long    *allocated_arps;
1062 	struct nes_qp    **qp_table;
1063 	struct workqueue_struct *work_q;
1065 	struct list_head list;
1066 	struct list_head active_listeners;
1068 	struct list_head nesvnic_list[4];
1070 	struct timer_list  mh_timer;
1071 	struct timer_list  lc_timer;
1072 	struct work_struct work;
1073 	spinlock_t         resource_lock;
1074 	spinlock_t         phy_lock;
1075 	spinlock_t         pbl_lock;
1076 	spinlock_t         periodic_timer_lock;
1078 	struct nes_arp_entry arp_table[NES_MAX_ARP_TABLE_SIZE];
1081 	struct nes_hw_ceq ceq[16];
1082 	struct nes_hw_aeq aeq[8];
1084 	struct nes_hw_tune_timer tune_timer;
1086 	unsigned long doorbell_start;
1088 	u32 hw_rev;
1089 	u32 vendor_id;
1090 	u32 vendor_part_id;
1091 	u32 device_cap_flags;
1092 	u32 tick_delta;
1093 	u32 timer_int_req;
1094 	u32 arp_table_size;
1095 	u32 next_arp_index;
1097 	u32 max_mr;
1098 	u32 max_256pbl;
1099 	u32 max_4kpbl;
1100 	u32 free_256pbl;
1101 	u32 free_4kpbl;
1102 	u32 max_mr_size;
1103 	u32 max_qp;
1104 	u32 next_qp;
1105 	u32 max_irrq;
1106 	u32 max_qp_wr;
1107 	u32 max_sge;
1108 	u32 max_cq;
1109 	u32 next_cq;
1110 	u32 max_cqe;
1111 	u32 max_pd;
1112 	u32 base_pd;
1113 	u32 next_pd;
1114 	u32 hte_index_mask;
1117 	u32 rx_pool_size;
1118 	u32 tx_pool_size;
1119 	u32 rx_threshold;
1120 	u32 tcp_timer_core_clk_divisor;
1121 	u32 iwarp_config;
1122 	u32 cm_config;
1123 	u32 sws_timer_config;
1124 	u32 tcp_config1;
1125 	u32 wqm_wat;
1126 	u32 core_clock;
1127 	u32 firmware_version;
1128 	u32 eeprom_version;
1130 	u32 nic_rx_eth_route_err;
1132 	u32 et_rx_coalesce_usecs;
1133 	u32 et_rx_max_coalesced_frames;
1134 	u32 et_rx_coalesce_usecs_irq;
1135 	u32 et_rx_max_coalesced_frames_irq;
1136 	u32 et_pkt_rate_low;
1137 	u32 et_rx_coalesce_usecs_low;
1138 	u32 et_rx_max_coalesced_frames_low;
1139 	u32 et_pkt_rate_high;
1140 	u32 et_rx_coalesce_usecs_high;
1141 	u32 et_rx_max_coalesced_frames_high;
1142 	u32 et_rate_sample_interval;
1143 	u32 timer_int_limit;
1144 	u32 wqm_quanta;
1145 	u8 allow_unaligned_fpdus;
1148 	u32 mac_addr_low;
1149 	u16 mac_addr_high;
1151 	u16 firmware_eeprom_offset;
1152 	u16 software_eeprom_offset;
1154 	u16 max_irrq_wr;
1157 	u16 pd_config_size[4];
1158 	u16 pd_config_base[4];
1160 	u16 link_interrupt_count[4];
1161 	u8 crit_error_count[32];
1164 	u8  phy_index[4];
1165 	u8  mac_sw_state[4];
1166 	u8  mac_link_down[4];
1167 	u8  phy_type[4];
1168 	u8  log_port;
1171 	unsigned int  devfn;
1172 	unsigned char bus_number;
1173 	unsigned char OneG_Mode;
1175 	unsigned char ref_count;
1176 	u8            netdev_count;
1177 	u8            netdev_max;	/* from host nic address count in EEPROM */
1178 	u8            port_count;
1179 	u8            virtwq;
1180 	u8            send_term_ok;
1181 	u8            et_use_adaptive_rx_coalesce;
1182 	u8            adapter_fcn_count;
1183 	u8 pft_mcast_map[NES_PFT_SIZE];