Lines Matching full:i2c
2 * i2c-xiic.c
37 #include <linux/i2c.h>
40 #include <linux/i2c-xiic.h>
44 #define DRIVER_NAME "xiic-i2c"
53 * struct xiic_i2c - Internal representation of the XIIC I2C bus
170 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos) argument
171 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos) argument
173 static void xiic_start_xfer(struct xiic_i2c *i2c);
174 static void __xiic_start_xfer(struct xiic_i2c *i2c);
176 static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value) in xiic_setreg8() argument
178 iowrite8(value, i2c->base + reg); in xiic_setreg8()
181 static inline u8 xiic_getreg8(struct xiic_i2c *i2c, int reg) in xiic_getreg8() argument
183 return ioread8(i2c->base + reg); in xiic_getreg8()
186 static inline void xiic_setreg16(struct xiic_i2c *i2c, int reg, u16 value) in xiic_setreg16() argument
188 iowrite16(value, i2c->base + reg); in xiic_setreg16()
191 static inline void xiic_setreg32(struct xiic_i2c *i2c, int reg, int value) in xiic_setreg32() argument
193 iowrite32(value, i2c->base + reg); in xiic_setreg32()
196 static inline int xiic_getreg32(struct xiic_i2c *i2c, int reg) in xiic_getreg32() argument
198 return ioread32(i2c->base + reg); in xiic_getreg32()
201 static inline void xiic_irq_dis(struct xiic_i2c *i2c, u32 mask) in xiic_irq_dis() argument
203 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_dis()
204 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier & ~mask); in xiic_irq_dis()
207 static inline void xiic_irq_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_en() argument
209 u32 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_irq_en()
210 xiic_setreg32(i2c, XIIC_IIER_OFFSET, ier | mask); in xiic_irq_en()
213 static inline void xiic_irq_clr(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr() argument
215 u32 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_irq_clr()
216 xiic_setreg32(i2c, XIIC_IISR_OFFSET, isr & mask); in xiic_irq_clr()
219 static inline void xiic_irq_clr_en(struct xiic_i2c *i2c, u32 mask) in xiic_irq_clr_en() argument
221 xiic_irq_clr(i2c, mask); in xiic_irq_clr_en()
222 xiic_irq_en(i2c, mask); in xiic_irq_clr_en()
225 static void xiic_clear_rx_fifo(struct xiic_i2c *i2c) in xiic_clear_rx_fifo() argument
228 for (sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
230 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)) in xiic_clear_rx_fifo()
231 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_clear_rx_fifo()
234 static void xiic_reinit(struct xiic_i2c *i2c) in xiic_reinit() argument
236 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_reinit()
239 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, IIC_RX_FIFO_DEPTH - 1); in xiic_reinit()
242 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_TX_FIFO_RESET_MASK); in xiic_reinit()
245 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, XIIC_CR_ENABLE_DEVICE_MASK); in xiic_reinit()
248 xiic_clear_rx_fifo(i2c); in xiic_reinit()
251 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); in xiic_reinit()
253 xiic_irq_clr_en(i2c, XIIC_INTR_AAS_MASK | XIIC_INTR_ARB_LOST_MASK); in xiic_reinit()
256 static void xiic_deinit(struct xiic_i2c *i2c) in xiic_deinit() argument
260 xiic_setreg32(i2c, XIIC_RESETR_OFFSET, XIIC_RESET_MASK); in xiic_deinit()
263 cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET); in xiic_deinit()
264 xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr & ~XIIC_CR_ENABLE_DEVICE_MASK); in xiic_deinit()
267 static void xiic_read_rx(struct xiic_i2c *i2c) in xiic_read_rx() argument
272 bytes_in_fifo = xiic_getreg8(i2c, XIIC_RFO_REG_OFFSET) + 1; in xiic_read_rx()
274 dev_dbg(i2c->adap.dev.parent, "%s entry, bytes in fifo: %d, msg: %d" in xiic_read_rx()
276 __func__, bytes_in_fifo, xiic_rx_space(i2c), in xiic_read_rx()
277 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_read_rx()
278 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_read_rx()
280 if (bytes_in_fifo > xiic_rx_space(i2c)) in xiic_read_rx()
281 bytes_in_fifo = xiic_rx_space(i2c); in xiic_read_rx()
284 i2c->rx_msg->buf[i2c->rx_pos++] = in xiic_read_rx()
285 xiic_getreg8(i2c, XIIC_DRR_REG_OFFSET); in xiic_read_rx()
287 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, in xiic_read_rx()
288 (xiic_rx_space(i2c) > IIC_RX_FIFO_DEPTH) ? in xiic_read_rx()
289 IIC_RX_FIFO_DEPTH - 1 : xiic_rx_space(i2c) - 1); in xiic_read_rx()
292 static int xiic_tx_fifo_space(struct xiic_i2c *i2c) in xiic_tx_fifo_space() argument
295 return IIC_TX_FIFO_DEPTH - xiic_getreg8(i2c, XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
298 static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) in xiic_fill_tx_fifo() argument
300 u8 fifo_space = xiic_tx_fifo_space(i2c); in xiic_fill_tx_fifo()
301 int len = xiic_tx_space(i2c); in xiic_fill_tx_fifo()
305 dev_dbg(i2c->adap.dev.parent, "%s entry, len: %d, fifo space: %d\n", in xiic_fill_tx_fifo()
309 u16 data = i2c->tx_msg->buf[i2c->tx_pos++]; in xiic_fill_tx_fifo()
310 if ((xiic_tx_space(i2c) == 0) && (i2c->nmsgs == 1)) { in xiic_fill_tx_fifo()
313 dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__); in xiic_fill_tx_fifo()
315 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_fill_tx_fifo()
317 xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_fill_tx_fifo()
321 static void xiic_wakeup(struct xiic_i2c *i2c, int code) in xiic_wakeup() argument
323 i2c->tx_msg = NULL; in xiic_wakeup()
324 i2c->rx_msg = NULL; in xiic_wakeup()
325 i2c->nmsgs = 0; in xiic_wakeup()
326 i2c->state = code; in xiic_wakeup()
327 wake_up(&i2c->wait); in xiic_wakeup()
330 static void xiic_process(struct xiic_i2c *i2c) in xiic_process() argument
340 isr = xiic_getreg32(i2c, XIIC_IISR_OFFSET); in xiic_process()
341 ier = xiic_getreg32(i2c, XIIC_IIER_OFFSET); in xiic_process()
344 dev_dbg(i2c->adap.dev.parent, "%s entry, IER: 0x%x, ISR: 0x%x, " in xiic_process()
346 __func__, ier, isr, pend, xiic_getreg8(i2c, XIIC_SR_REG_OFFSET), in xiic_process()
347 i2c->tx_msg, i2c->nmsgs); in xiic_process()
365 dev_dbg(i2c->adap.dev.parent, "%s error\n", __func__); in xiic_process()
371 xiic_reinit(i2c); in xiic_process()
373 if (i2c->tx_msg) in xiic_process()
374 xiic_wakeup(i2c, STATE_ERROR); in xiic_process()
380 if (!i2c->rx_msg) { in xiic_process()
381 dev_dbg(i2c->adap.dev.parent, in xiic_process()
383 xiic_clear_rx_fifo(i2c); in xiic_process()
387 xiic_read_rx(i2c); in xiic_process()
388 if (xiic_rx_space(i2c) == 0) { in xiic_process()
390 i2c->rx_msg = NULL; in xiic_process()
395 dev_dbg(i2c->adap.dev.parent, in xiic_process()
397 __func__, i2c->nmsgs); in xiic_process()
403 if (i2c->nmsgs > 1) { in xiic_process()
404 i2c->nmsgs--; in xiic_process()
405 i2c->tx_msg++; in xiic_process()
406 dev_dbg(i2c->adap.dev.parent, in xiic_process()
409 __xiic_start_xfer(i2c); in xiic_process()
417 xiic_irq_dis(i2c, XIIC_INTR_BNB_MASK); in xiic_process()
419 if (!i2c->tx_msg) in xiic_process()
422 if ((i2c->nmsgs == 1) && !i2c->rx_msg && in xiic_process()
423 xiic_tx_space(i2c) == 0) in xiic_process()
424 xiic_wakeup(i2c, STATE_DONE); in xiic_process()
426 xiic_wakeup(i2c, STATE_ERROR); in xiic_process()
434 if (!i2c->tx_msg) { in xiic_process()
435 dev_dbg(i2c->adap.dev.parent, in xiic_process()
440 xiic_fill_tx_fifo(i2c); in xiic_process()
443 if (!xiic_tx_space(i2c) && xiic_tx_fifo_space(i2c) >= 2) { in xiic_process()
444 dev_dbg(i2c->adap.dev.parent, in xiic_process()
446 __func__, i2c->nmsgs); in xiic_process()
447 if (i2c->nmsgs > 1) { in xiic_process()
448 i2c->nmsgs--; in xiic_process()
449 i2c->tx_msg++; in xiic_process()
450 __xiic_start_xfer(i2c); in xiic_process()
452 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
454 dev_dbg(i2c->adap.dev.parent, in xiic_process()
458 } else if (!xiic_tx_space(i2c) && (i2c->nmsgs == 1)) in xiic_process()
462 xiic_irq_dis(i2c, XIIC_INTR_TX_HALF_MASK); in xiic_process()
465 dev_err(i2c->adap.dev.parent, "%s Got unexpected IRQ\n", in xiic_process()
470 dev_dbg(i2c->adap.dev.parent, "%s clr: 0x%x\n", __func__, clr); in xiic_process()
472 xiic_setreg32(i2c, XIIC_IISR_OFFSET, clr); in xiic_process()
475 static int xiic_bus_busy(struct xiic_i2c *i2c) in xiic_bus_busy() argument
477 u8 sr = xiic_getreg8(i2c, XIIC_SR_REG_OFFSET); in xiic_bus_busy()
482 static int xiic_busy(struct xiic_i2c *i2c) in xiic_busy() argument
487 if (i2c->tx_msg) in xiic_busy()
494 err = xiic_bus_busy(i2c); in xiic_busy()
497 err = xiic_bus_busy(i2c); in xiic_busy()
503 static void xiic_start_recv(struct xiic_i2c *i2c) in xiic_start_recv() argument
506 struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; in xiic_start_recv()
509 xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK); in xiic_start_recv()
520 xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1); in xiic_start_recv()
524 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
528 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
530 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, in xiic_start_recv()
531 msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0)); in xiic_start_recv()
532 if (i2c->nmsgs == 1) in xiic_start_recv()
534 xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK); in xiic_start_recv()
537 i2c->tx_pos = msg->len; in xiic_start_recv()
540 static void xiic_start_send(struct xiic_i2c *i2c) in xiic_start_send() argument
542 struct i2c_msg *msg = i2c->tx_msg; in xiic_start_send()
544 xiic_irq_clr(i2c, XIIC_INTR_TX_ERROR_MASK); in xiic_start_send()
546 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, len: %d, " in xiic_start_send()
548 __func__, msg, msg->len, xiic_getreg32(i2c, XIIC_IISR_OFFSET), in xiic_start_send()
549 xiic_getreg8(i2c, XIIC_CR_REG_OFFSET)); in xiic_start_send()
555 if ((i2c->nmsgs == 1) && msg->len == 0) in xiic_start_send()
559 xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data); in xiic_start_send()
562 xiic_fill_tx_fifo(i2c); in xiic_start_send()
565 xiic_irq_clr_en(i2c, XIIC_INTR_TX_EMPTY_MASK | XIIC_INTR_TX_ERROR_MASK | in xiic_start_send()
571 struct xiic_i2c *i2c = dev_id; in xiic_isr() local
573 spin_lock(&i2c->lock); in xiic_isr()
575 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0); in xiic_isr()
577 dev_dbg(i2c->adap.dev.parent, "%s entry\n", __func__); in xiic_isr()
579 xiic_process(i2c); in xiic_isr()
581 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); in xiic_isr()
582 spin_unlock(&i2c->lock); in xiic_isr()
587 static void __xiic_start_xfer(struct xiic_i2c *i2c) in __xiic_start_xfer() argument
590 int fifo_space = xiic_tx_fifo_space(i2c); in __xiic_start_xfer()
591 dev_dbg(i2c->adap.dev.parent, "%s entry, msg: %p, fifos space: %d\n", in __xiic_start_xfer()
592 __func__, i2c->tx_msg, fifo_space); in __xiic_start_xfer()
594 if (!i2c->tx_msg) in __xiic_start_xfer()
597 i2c->rx_pos = 0; in __xiic_start_xfer()
598 i2c->tx_pos = 0; in __xiic_start_xfer()
599 i2c->state = STATE_START; in __xiic_start_xfer()
600 while ((fifo_space >= 2) && (first || (i2c->nmsgs > 1))) { in __xiic_start_xfer()
602 i2c->nmsgs--; in __xiic_start_xfer()
603 i2c->tx_msg++; in __xiic_start_xfer()
604 i2c->tx_pos = 0; in __xiic_start_xfer()
608 if (i2c->tx_msg->flags & I2C_M_RD) { in __xiic_start_xfer()
610 xiic_start_recv(i2c); in __xiic_start_xfer()
613 xiic_start_send(i2c); in __xiic_start_xfer()
614 if (xiic_tx_space(i2c) != 0) { in __xiic_start_xfer()
620 fifo_space = xiic_tx_fifo_space(i2c); in __xiic_start_xfer()
626 if (i2c->nmsgs > 1 || xiic_tx_space(i2c)) in __xiic_start_xfer()
627 xiic_irq_clr_en(i2c, XIIC_INTR_TX_HALF_MASK); in __xiic_start_xfer()
631 static void xiic_start_xfer(struct xiic_i2c *i2c) in xiic_start_xfer() argument
635 spin_lock_irqsave(&i2c->lock, flags); in xiic_start_xfer()
636 xiic_reinit(i2c); in xiic_start_xfer()
638 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, 0); in xiic_start_xfer()
639 spin_unlock_irqrestore(&i2c->lock, flags); in xiic_start_xfer()
641 __xiic_start_xfer(i2c); in xiic_start_xfer()
642 xiic_setreg32(i2c, XIIC_DGIER_OFFSET, XIIC_GINTR_ENABLE_MASK); in xiic_start_xfer()
647 struct xiic_i2c *i2c = i2c_get_adapdata(adap); in xiic_xfer() local
651 xiic_getreg8(i2c, XIIC_SR_REG_OFFSET)); in xiic_xfer()
653 err = xiic_busy(i2c); in xiic_xfer()
657 i2c->tx_msg = msgs; in xiic_xfer()
658 i2c->nmsgs = num; in xiic_xfer()
660 xiic_start_xfer(i2c); in xiic_xfer()
662 if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) || in xiic_xfer()
663 (i2c->state == STATE_DONE), HZ)) in xiic_xfer()
664 return (i2c->state == STATE_DONE) ? num : -EIO; in xiic_xfer()
666 i2c->tx_msg = NULL; in xiic_xfer()
667 i2c->rx_msg = NULL; in xiic_xfer()
668 i2c->nmsgs = 0; in xiic_xfer()
693 struct xiic_i2c *i2c; in xiic_i2c_probe() local
711 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); in xiic_i2c_probe()
712 if (!i2c) in xiic_i2c_probe()
721 i2c->base = ioremap(res->start, resource_size(res)); in xiic_i2c_probe()
722 if (!i2c->base) { in xiic_i2c_probe()
729 platform_set_drvdata(pdev, i2c); in xiic_i2c_probe()
730 i2c->adap = xiic_adapter; in xiic_i2c_probe()
731 i2c_set_adapdata(&i2c->adap, i2c); in xiic_i2c_probe()
732 i2c->adap.dev.parent = &pdev->dev; in xiic_i2c_probe()
734 xiic_reinit(i2c); in xiic_i2c_probe()
736 spin_lock_init(&i2c->lock); in xiic_i2c_probe()
737 init_waitqueue_head(&i2c->wait); in xiic_i2c_probe()
738 ret = request_irq(irq, xiic_isr, 0, pdev->name, i2c); in xiic_i2c_probe()
744 /* add i2c adapter to i2c tree */ in xiic_i2c_probe()
745 ret = i2c_add_adapter(&i2c->adap); in xiic_i2c_probe()
753 i2c_new_device(&i2c->adap, pdata->devices + i); in xiic_i2c_probe()
758 free_irq(irq, i2c); in xiic_i2c_probe()
760 xiic_deinit(i2c); in xiic_i2c_probe()
761 iounmap(i2c->base); in xiic_i2c_probe()
765 kfree(i2c); in xiic_i2c_probe()
775 struct xiic_i2c *i2c = platform_get_drvdata(pdev); in xiic_i2c_remove() local
779 i2c_del_adapter(&i2c->adap); in xiic_i2c_remove()
781 xiic_deinit(i2c); in xiic_i2c_remove()
785 free_irq(platform_get_irq(pdev, 0), i2c); in xiic_i2c_remove()
787 iounmap(i2c->base); in xiic_i2c_remove()
793 kfree(i2c); in xiic_i2c_remove()
810 MODULE_DESCRIPTION("Xilinx I2C bus driver");