Lines Matching defs:_ATOM_INTEGRATED_SYSTEM_INFO
2449 typedef struct _ATOM_INTEGRATED_SYSTEM_INFO struct
2451 ATOM_COMMON_TABLE_HEADER sHeader;
2452 ULONG ulBootUpEngineClock; //in 10kHz unit
2453 ULONG ulBootUpMemoryClock; //in 10kHz unit
2454 ULONG ulMaxSystemMemoryClock; //in 10kHz unit
2455 ULONG ulMinSystemMemoryClock; //in 10kHz unit
2456 UCHAR ucNumberOfCyclesInPeriodHi;
2457 … ucLCDTimingSel; //=0:not valid.!=0 sel this timing descriptor from LCD EDID.
2458 USHORT usReserved1;
2459 … usInterNBVoltageLow; //An intermidiate PMW value to set the voltage
2460 … usInterNBVoltageHigh; //Another intermidiate PMW value to set the voltage
2461 ULONG ulReserved[2];
2463 USHORT usFSBClock; //In MHz unit
2464 …ityFlag; //Bit0=1 indicates the fake HDMI support,Bit1=0/1 for Dynamic clocking dis/enable
2467 … usPCIENBCfgReg7; //bit[7:0]=MUX_Sel, bit[9:8]=MUX_SEL_LEVEL2, bit[10]=Lane_Reversal
2468 USHORT usK8MemoryClock; //in MHz unit
2469 USHORT usK8SyncStartDelay; //in 0.01 us unit
2470 USHORT usK8DataReturnTime; //in 0.01 us unit
2471 UCHAR ucMaxNBVoltage;
2472 UCHAR ucMinNBVoltage;
2473 … ucMemoryType; //[7:4]=1:DDR1;=2:DDR2;=3:DDR3.[3:0] is reserved
2474 … ucNumberOfCyclesInPeriod; //CG.FVTHROT_PWM_CTRL_REG0.NumberOfCyclesInPeriod
2475 … ucStartingPWM_HighTime; //CG.FVTHROT_PWM_CTRL_REG0.StartingPWM_HighTime
2476 UCHAR ucHTLinkWidth; //16 bit vs. 8 bit
2477 UCHAR ucMaxNBVoltageHigh;
2478 UCHAR ucMinNBVoltageHigh;