Lines Matching defs:drm_i915_gem_object

758 struct drm_i915_gem_object {  struct
759 	struct drm_gem_object base;
762 	struct drm_mm_node *gtt_space;
763 	struct list_head gtt_list;
766 	struct list_head ring_list;
767 	struct list_head mm_list;
769 	struct list_head gpu_write_list;
771 	struct list_head exec_list;
778 	unsigned int active:1;
784 	unsigned int dirty:1;
790 	unsigned int pending_gpu_write:1;
797 	signed int fence_reg:I915_MAX_NUM_FENCE_BITS;
802 	unsigned int madv:2;
807 	unsigned int tiling_mode:2;
808 	unsigned int tiling_changed:1;
819 	unsigned int pin_count:4;
826 	unsigned int map_and_fenceable:1;
833 	unsigned int fault_mappable:1;
834 	unsigned int pin_mappable:1;
839 	unsigned int pending_fenced_gpu_access:1;
840 	unsigned int fenced_gpu_access:1;
842 	unsigned int cache_level:2;
844 	struct page **pages;
849 	struct scatterlist *sg_list;
850 	int num_sg;
855 	struct hlist_node exec_node;
856 	unsigned long exec_handle;
857 	struct drm_i915_gem_exec_object2 *exec_entry;
864 	uint32_t gtt_offset;
867 	uint32_t last_rendering_seqno;
868 	struct intel_ring_buffer *ring;
871 	uint32_t last_fenced_seqno;
872 	struct intel_ring_buffer *last_fenced_ring;
875 	uint32_t stride;
878 	unsigned long *bit_17;
902 #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)  argument