Lines Matching +full:chip +full:- +full:to +full:- +full:chip
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
52 OKISEMI_ML7223m_IOH, /* LAPIS Semiconductor ML7223 IOH PCIe Bus-m */
53 OKISEMI_ML7223n_IOH /* LAPIS Semiconductor ML7223 IOH PCIe Bus-n */
64 * struct pch_gpio_reg_data - The register store data.
65 * @ien_reg: To store contents of IEN register.
66 * @imask_reg: To store contents of IMASK register.
67 * @po_reg: To store contents of PO register.
68 * @pm_reg: To store contents of PM register.
69 * @im0_reg: To store contents of IM0 register.
70 * @im1_reg: To store contents of IM1 register.
71 * @gpio_use_sel_reg : To store contents of GPIO_USE_SEL register.
72 * (Only ML7223 Bus-n)
85 * struct pch_gpio - GPIO private data structure.
88 * @dev: Pointer to device structure.
114 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); in pch_gpio_set() local
116 mutex_lock(&chip->lock); in pch_gpio_set()
117 reg_val = ioread32(&chip->reg->po); in pch_gpio_set()
123 iowrite32(reg_val, &chip->reg->po); in pch_gpio_set()
124 mutex_unlock(&chip->lock); in pch_gpio_set()
129 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); in pch_gpio_get() local
131 return ioread32(&chip->reg->pi) & (1 << nr); in pch_gpio_get()
137 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); in pch_gpio_direction_output() local
141 mutex_lock(&chip->lock); in pch_gpio_direction_output()
142 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); in pch_gpio_direction_output()
144 iowrite32(pm, &chip->reg->pm); in pch_gpio_direction_output()
146 reg_val = ioread32(&chip->reg->po); in pch_gpio_direction_output()
151 iowrite32(reg_val, &chip->reg->po); in pch_gpio_direction_output()
153 mutex_unlock(&chip->lock); in pch_gpio_direction_output()
160 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); in pch_gpio_direction_input() local
163 mutex_lock(&chip->lock); in pch_gpio_direction_input()
164 pm = ioread32(&chip->reg->pm) & ((1 << gpio_pins[chip->ioh]) - 1); in pch_gpio_direction_input()
166 iowrite32(pm, &chip->reg->pm); in pch_gpio_direction_input()
167 mutex_unlock(&chip->lock); in pch_gpio_direction_input()
175 static void pch_gpio_save_reg_conf(struct pch_gpio *chip) in pch_gpio_save_reg_conf() argument
177 chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); in pch_gpio_save_reg_conf()
178 chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); in pch_gpio_save_reg_conf()
179 chip->pch_gpio_reg.po_reg = ioread32(&chip->reg->po); in pch_gpio_save_reg_conf()
180 chip->pch_gpio_reg.pm_reg = ioread32(&chip->reg->pm); in pch_gpio_save_reg_conf()
181 chip->pch_gpio_reg.im0_reg = ioread32(&chip->reg->im0); in pch_gpio_save_reg_conf()
182 if (chip->ioh == INTEL_EG20T_PCH) in pch_gpio_save_reg_conf()
183 chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); in pch_gpio_save_reg_conf()
184 if (chip->ioh == OKISEMI_ML7223n_IOH) in pch_gpio_save_reg_conf()
185 chip->pch_gpio_reg.gpio_use_sel_reg =\ in pch_gpio_save_reg_conf()
186 ioread32(&chip->reg->gpio_use_sel); in pch_gpio_save_reg_conf()
192 static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) in pch_gpio_restore_reg_conf() argument
194 iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); in pch_gpio_restore_reg_conf()
195 iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); in pch_gpio_restore_reg_conf()
196 /* to store contents of PO register */ in pch_gpio_restore_reg_conf()
197 iowrite32(chip->pch_gpio_reg.po_reg, &chip->reg->po); in pch_gpio_restore_reg_conf()
198 /* to store contents of PM register */ in pch_gpio_restore_reg_conf()
199 iowrite32(chip->pch_gpio_reg.pm_reg, &chip->reg->pm); in pch_gpio_restore_reg_conf()
200 iowrite32(chip->pch_gpio_reg.im0_reg, &chip->reg->im0); in pch_gpio_restore_reg_conf()
201 if (chip->ioh == INTEL_EG20T_PCH) in pch_gpio_restore_reg_conf()
202 iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1); in pch_gpio_restore_reg_conf()
203 if (chip->ioh == OKISEMI_ML7223n_IOH) in pch_gpio_restore_reg_conf()
204 iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, in pch_gpio_restore_reg_conf()
205 &chip->reg->gpio_use_sel); in pch_gpio_restore_reg_conf()
210 struct pch_gpio *chip = container_of(gpio, struct pch_gpio, gpio); in pch_gpio_to_irq() local
211 return chip->irq_base + offset; in pch_gpio_to_irq()
214 static void pch_gpio_setup(struct pch_gpio *chip) in pch_gpio_setup() argument
216 struct gpio_chip *gpio = &chip->gpio; in pch_gpio_setup()
218 gpio->label = dev_name(chip->dev); in pch_gpio_setup()
219 gpio->owner = THIS_MODULE; in pch_gpio_setup()
220 gpio->direction_input = pch_gpio_direction_input; in pch_gpio_setup()
221 gpio->get = pch_gpio_get; in pch_gpio_setup()
222 gpio->direction_output = pch_gpio_direction_output; in pch_gpio_setup()
223 gpio->set = pch_gpio_set; in pch_gpio_setup()
224 gpio->dbg_show = NULL; in pch_gpio_setup()
225 gpio->base = -1; in pch_gpio_setup()
226 gpio->ngpio = gpio_pins[chip->ioh]; in pch_gpio_setup()
227 gpio->can_sleep = 0; in pch_gpio_setup()
228 gpio->to_irq = pch_gpio_to_irq; in pch_gpio_setup()
240 int irq = d->irq; in pch_irq_type()
242 struct pch_gpio *chip = gc->private; in pch_irq_type() local
244 ch = irq - chip->irq_base; in pch_irq_type()
245 if (irq <= chip->irq_base + 7) { in pch_irq_type()
246 im_reg = &chip->reg->im0; in pch_irq_type()
249 im_reg = &chip->reg->im1; in pch_irq_type()
250 im_pos = ch - 8; in pch_irq_type()
252 dev_dbg(chip->dev, "%s:irq=%d type=%d ch=%d pos=%d\n", in pch_irq_type()
255 spin_lock_irqsave(&chip->spinlock, flags); in pch_irq_type()
276 dev_warn(chip->dev, "%s: unknown type(%dd)", in pch_irq_type()
286 iowrite32(BIT(ch), &chip->reg->iclr); in pch_irq_type()
289 iowrite32(BIT(ch), &chip->reg->imaskclr); in pch_irq_type()
292 ien = ioread32(&chip->reg->ien); in pch_irq_type()
293 iowrite32(ien | BIT(ch), &chip->reg->ien); in pch_irq_type()
295 spin_unlock_irqrestore(&chip->spinlock, flags); in pch_irq_type()
303 struct pch_gpio *chip = gc->private; in pch_irq_unmask() local
305 iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imaskclr); in pch_irq_unmask()
311 struct pch_gpio *chip = gc->private; in pch_irq_mask() local
313 iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imask); in pch_irq_mask()
318 struct pch_gpio *chip = dev_id; in pch_gpio_handler() local
319 u32 reg_val = ioread32(&chip->reg->istatus); in pch_gpio_handler()
323 for (i = 0; i < gpio_pins[chip->ioh]; i++) { in pch_gpio_handler()
325 dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%x\n", in pch_gpio_handler()
327 iowrite32(BIT(i), &chip->reg->iclr); in pch_gpio_handler()
328 generic_handle_irq(chip->irq_base + i); in pch_gpio_handler()
335 static __devinit void pch_gpio_alloc_generic_chip(struct pch_gpio *chip, in pch_gpio_alloc_generic_chip() argument
341 gc = irq_alloc_generic_chip("pch_gpio", 1, irq_start, chip->base, in pch_gpio_alloc_generic_chip()
343 gc->private = chip; in pch_gpio_alloc_generic_chip()
344 ct = gc->chip_types; in pch_gpio_alloc_generic_chip()
346 ct->chip.irq_mask = pch_irq_mask; in pch_gpio_alloc_generic_chip()
347 ct->chip.irq_unmask = pch_irq_unmask; in pch_gpio_alloc_generic_chip()
348 ct->chip.irq_set_type = pch_irq_type; in pch_gpio_alloc_generic_chip()
358 struct pch_gpio *chip; in pch_gpio_probe() local
361 chip = kzalloc(sizeof(*chip), GFP_KERNEL); in pch_gpio_probe()
362 if (chip == NULL) in pch_gpio_probe()
363 return -ENOMEM; in pch_gpio_probe()
365 chip->dev = &pdev->dev; in pch_gpio_probe()
368 dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__); in pch_gpio_probe()
374 dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret); in pch_gpio_probe()
378 chip->base = pci_iomap(pdev, 1, 0); in pch_gpio_probe()
379 if (!chip->base) { in pch_gpio_probe()
380 dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__); in pch_gpio_probe()
381 ret = -ENOMEM; in pch_gpio_probe()
385 if (pdev->device == 0x8803) in pch_gpio_probe()
386 chip->ioh = INTEL_EG20T_PCH; in pch_gpio_probe()
387 else if (pdev->device == 0x8014) in pch_gpio_probe()
388 chip->ioh = OKISEMI_ML7223m_IOH; in pch_gpio_probe()
389 else if (pdev->device == 0x8043) in pch_gpio_probe()
390 chip->ioh = OKISEMI_ML7223n_IOH; in pch_gpio_probe()
392 chip->reg = chip->base; in pch_gpio_probe()
393 pci_set_drvdata(pdev, chip); in pch_gpio_probe()
394 mutex_init(&chip->lock); in pch_gpio_probe()
395 spin_lock_init(&chip->spinlock); in pch_gpio_probe()
396 pch_gpio_setup(chip); in pch_gpio_probe()
397 ret = gpiochip_add(&chip->gpio); in pch_gpio_probe()
399 dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); in pch_gpio_probe()
403 irq_base = irq_alloc_descs(-1, 0, gpio_pins[chip->ioh], NUMA_NO_NODE); in pch_gpio_probe()
405 dev_warn(&pdev->dev, "PCH gpio: Failed to get IRQ base num\n"); in pch_gpio_probe()
406 chip->irq_base = -1; in pch_gpio_probe()
409 chip->irq_base = irq_base; in pch_gpio_probe()
411 ret = request_irq(pdev->irq, pch_gpio_handler, in pch_gpio_probe()
412 IRQF_SHARED, KBUILD_MODNAME, chip); in pch_gpio_probe()
414 dev_err(&pdev->dev, in pch_gpio_probe()
419 pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); in pch_gpio_probe()
422 iowrite32(0, &chip->reg->ien); in pch_gpio_probe()
427 irq_free_descs(irq_base, gpio_pins[chip->ioh]); in pch_gpio_probe()
429 ret = gpiochip_remove(&chip->gpio); in pch_gpio_probe()
431 dev_err(&pdev->dev, "%s gpiochip_remove failed\n", __func__); in pch_gpio_probe()
434 pci_iounmap(pdev, chip->base); in pch_gpio_probe()
443 kfree(chip); in pch_gpio_probe()
444 dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); in pch_gpio_probe()
451 struct pch_gpio *chip = pci_get_drvdata(pdev); in pch_gpio_remove() local
453 if (chip->irq_base != -1) { in pch_gpio_remove()
454 free_irq(pdev->irq, chip); in pch_gpio_remove()
456 irq_free_descs(chip->irq_base, gpio_pins[chip->ioh]); in pch_gpio_remove()
459 err = gpiochip_remove(&chip->gpio); in pch_gpio_remove()
461 dev_err(&pdev->dev, "Failed gpiochip_remove\n"); in pch_gpio_remove()
463 pci_iounmap(pdev, chip->base); in pch_gpio_remove()
466 kfree(chip); in pch_gpio_remove()
473 struct pch_gpio *chip = pci_get_drvdata(pdev); in pch_gpio_suspend() local
476 spin_lock_irqsave(&chip->spinlock, flags); in pch_gpio_suspend()
477 pch_gpio_save_reg_conf(chip); in pch_gpio_suspend()
478 spin_unlock_irqrestore(&chip->spinlock, flags); in pch_gpio_suspend()
482 dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); in pch_gpio_suspend()
489 dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); in pch_gpio_suspend()
497 struct pch_gpio *chip = pci_get_drvdata(pdev); in pch_gpio_resume() local
505 dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); in pch_gpio_resume()
510 spin_lock_irqsave(&chip->spinlock, flags); in pch_gpio_resume()
511 iowrite32(0x01, &chip->reg->reset); in pch_gpio_resume()
512 iowrite32(0x00, &chip->reg->reset); in pch_gpio_resume()
513 pch_gpio_restore_reg_conf(chip); in pch_gpio_resume()
514 spin_unlock_irqrestore(&chip->spinlock, flags); in pch_gpio_resume()