Lines Matching +full:memory +full:- +full:controller
2 * Freescale MPC85xx Memory Controller kenel module
6 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
55 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_data_hi_show()
57 in_be32(pdata->mc_vbase + in mpc85xx_mc_inject_data_hi_show()
64 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_data_lo_show()
66 in_be32(pdata->mc_vbase + in mpc85xx_mc_inject_data_lo_show()
72 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_ctrl_show()
74 in_be32(pdata->mc_vbase + MPC85XX_MC_ECC_ERR_INJECT)); in mpc85xx_mc_inject_ctrl_show()
80 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_data_hi_store()
82 out_be32(pdata->mc_vbase + MPC85XX_MC_DATA_ERR_INJECT_HI, in mpc85xx_mc_inject_data_hi_store()
92 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_data_lo_store()
94 out_be32(pdata->mc_vbase + MPC85XX_MC_DATA_ERR_INJECT_LO, in mpc85xx_mc_inject_data_lo_store()
104 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_inject_ctrl_store()
106 out_be32(pdata->mc_vbase + MPC85XX_MC_ECC_ERR_INJECT, in mpc85xx_mc_inject_ctrl_store()
144 mci->mc_driver_sysfs_attributes = mpc85xx_mc_sysfs_attributes; in mpc85xx_set_mc_sysfs_attributes()
152 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_check()
155 err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR); in mpc85xx_pci_check()
159 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
167 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB)); in mpc85xx_pci_check()
169 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR)); in mpc85xx_pci_check()
171 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR)); in mpc85xx_pci_check()
173 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL)); in mpc85xx_pci_check()
175 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH)); in mpc85xx_pci_check()
178 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
181 edac_pci_handle_pe(pci, pci->ctl_name); in mpc85xx_pci_check()
184 edac_pci_handle_npe(pci, pci->ctl_name); in mpc85xx_pci_check()
190 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_isr()
193 err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR); in mpc85xx_pci_isr()
210 if (!devres_open_group(&op->dev, mpc85xx_pci_err_probe, GFP_KERNEL)) in mpc85xx_pci_err_probe()
211 return -ENOMEM; in mpc85xx_pci_err_probe()
215 return -ENOMEM; in mpc85xx_pci_err_probe()
217 pdata = pci->pvt_info; in mpc85xx_pci_err_probe()
218 pdata->name = "mpc85xx_pci_err"; in mpc85xx_pci_err_probe()
219 pdata->irq = NO_IRQ; in mpc85xx_pci_err_probe()
220 dev_set_drvdata(&op->dev, pci); in mpc85xx_pci_err_probe()
221 pci->dev = &op->dev; in mpc85xx_pci_err_probe()
222 pci->mod_name = EDAC_MOD_STR; in mpc85xx_pci_err_probe()
223 pci->ctl_name = pdata->name; in mpc85xx_pci_err_probe()
224 pci->dev_name = dev_name(&op->dev); in mpc85xx_pci_err_probe()
227 pci->edac_check = mpc85xx_pci_check; in mpc85xx_pci_err_probe()
229 pdata->edac_idx = edac_pci_idx++; in mpc85xx_pci_err_probe()
231 res = of_address_to_resource(op->dev.of_node, 0, &r); in mpc85xx_pci_err_probe()
241 if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), in mpc85xx_pci_err_probe()
242 pdata->name)) { in mpc85xx_pci_err_probe()
245 res = -EBUSY; in mpc85xx_pci_err_probe()
249 pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); in mpc85xx_pci_err_probe()
250 if (!pdata->pci_vbase) { in mpc85xx_pci_err_probe()
252 res = -ENOMEM; in mpc85xx_pci_err_probe()
257 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR); in mpc85xx_pci_err_probe()
260 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40); in mpc85xx_pci_err_probe()
262 orig_pci_err_en = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN); in mpc85xx_pci_err_probe()
265 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40); in mpc85xx_pci_err_probe()
268 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0); in mpc85xx_pci_err_probe()
270 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) { in mpc85xx_pci_err_probe()
276 pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0); in mpc85xx_pci_err_probe()
277 res = devm_request_irq(&op->dev, pdata->irq, in mpc85xx_pci_err_probe()
283 "MPC85xx PCI err\n", __func__, pdata->irq); in mpc85xx_pci_err_probe()
284 irq_dispose_mapping(pdata->irq); in mpc85xx_pci_err_probe()
285 res = -ENODEV; in mpc85xx_pci_err_probe()
290 pdata->irq); in mpc85xx_pci_err_probe()
293 devres_remove_group(&op->dev, mpc85xx_pci_err_probe); in mpc85xx_pci_err_probe()
300 edac_pci_del_device(&op->dev); in mpc85xx_pci_err_probe()
303 devres_release_group(&op->dev, mpc85xx_pci_err_probe); in mpc85xx_pci_err_probe()
309 struct edac_pci_ctl_info *pci = dev_get_drvdata(&op->dev); in mpc85xx_pci_err_remove()
310 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_err_remove()
314 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, in mpc85xx_pci_err_remove()
317 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en); in mpc85xx_pci_err_remove()
319 edac_pci_del_device(pci->dev); in mpc85xx_pci_err_remove()
322 irq_dispose_mapping(pdata->irq); in mpc85xx_pci_err_remove()
331 .compatible = "fsl,mpc8540-pcix",
334 .compatible = "fsl,mpc8540-pci",
359 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_data_hi_show()
361 in_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI)); in mpc85xx_l2_inject_data_hi_show()
367 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_data_lo_show()
369 in_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO)); in mpc85xx_l2_inject_data_lo_show()
375 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_ctrl_show()
377 in_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL)); in mpc85xx_l2_inject_ctrl_show()
384 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_data_hi_store()
386 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI, in mpc85xx_l2_inject_data_hi_store()
397 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_data_lo_store()
399 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO, in mpc85xx_l2_inject_data_lo_store()
410 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_inject_ctrl_store()
412 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL, in mpc85xx_l2_inject_ctrl_store()
451 edac_dev->sysfs_attributes = mpc85xx_l2_sysfs_attributes; in mpc85xx_set_l2_sysfs_attributes()
458 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_check()
461 err_detect = in_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET); in mpc85xx_l2_check()
469 in_be32(pdata->l2_vbase + MPC85XX_L2_CAPTDATAHI)); in mpc85xx_l2_check()
471 in_be32(pdata->l2_vbase + MPC85XX_L2_CAPTDATALO)); in mpc85xx_l2_check()
473 in_be32(pdata->l2_vbase + MPC85XX_L2_CAPTECC)); in mpc85xx_l2_check()
475 in_be32(pdata->l2_vbase + MPC85XX_L2_ERRATTR)); in mpc85xx_l2_check()
477 in_be32(pdata->l2_vbase + MPC85XX_L2_ERRADDR)); in mpc85xx_l2_check()
480 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, err_detect); in mpc85xx_l2_check()
483 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in mpc85xx_l2_check()
486 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in mpc85xx_l2_check()
492 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_isr()
495 err_detect = in_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET); in mpc85xx_l2_isr()
512 if (!devres_open_group(&op->dev, mpc85xx_l2_err_probe, GFP_KERNEL)) in mpc85xx_l2_err_probe()
513 return -ENOMEM; in mpc85xx_l2_err_probe()
519 devres_release_group(&op->dev, mpc85xx_l2_err_probe); in mpc85xx_l2_err_probe()
520 return -ENOMEM; in mpc85xx_l2_err_probe()
523 pdata = edac_dev->pvt_info; in mpc85xx_l2_err_probe()
524 pdata->name = "mpc85xx_l2_err"; in mpc85xx_l2_err_probe()
525 pdata->irq = NO_IRQ; in mpc85xx_l2_err_probe()
526 edac_dev->dev = &op->dev; in mpc85xx_l2_err_probe()
527 dev_set_drvdata(edac_dev->dev, edac_dev); in mpc85xx_l2_err_probe()
528 edac_dev->ctl_name = pdata->name; in mpc85xx_l2_err_probe()
529 edac_dev->dev_name = pdata->name; in mpc85xx_l2_err_probe()
531 res = of_address_to_resource(op->dev.of_node, 0, &r); in mpc85xx_l2_err_probe()
541 if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), in mpc85xx_l2_err_probe()
542 pdata->name)) { in mpc85xx_l2_err_probe()
545 res = -EBUSY; in mpc85xx_l2_err_probe()
549 pdata->l2_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); in mpc85xx_l2_err_probe()
550 if (!pdata->l2_vbase) { in mpc85xx_l2_err_probe()
552 res = -ENOMEM; in mpc85xx_l2_err_probe()
556 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, ~0); in mpc85xx_l2_err_probe()
558 orig_l2_err_disable = in_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS); in mpc85xx_l2_err_probe()
561 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, 0); in mpc85xx_l2_err_probe()
563 edac_dev->mod_name = EDAC_MOD_STR; in mpc85xx_l2_err_probe()
566 edac_dev->edac_check = mpc85xx_l2_check; in mpc85xx_l2_err_probe()
570 pdata->edac_idx = edac_dev_idx++; in mpc85xx_l2_err_probe()
578 pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0); in mpc85xx_l2_err_probe()
579 res = devm_request_irq(&op->dev, pdata->irq, in mpc85xx_l2_err_probe()
585 "MPC85xx L2 err\n", __func__, pdata->irq); in mpc85xx_l2_err_probe()
586 irq_dispose_mapping(pdata->irq); in mpc85xx_l2_err_probe()
587 res = -ENODEV; in mpc85xx_l2_err_probe()
592 pdata->irq); in mpc85xx_l2_err_probe()
594 edac_dev->op_state = OP_RUNNING_INTERRUPT; in mpc85xx_l2_err_probe()
596 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, L2_EIE_MASK); in mpc85xx_l2_err_probe()
599 devres_remove_group(&op->dev, mpc85xx_l2_err_probe); in mpc85xx_l2_err_probe()
607 edac_device_del_device(&op->dev); in mpc85xx_l2_err_probe()
609 devres_release_group(&op->dev, mpc85xx_l2_err_probe); in mpc85xx_l2_err_probe()
616 struct edac_device_ctl_info *edac_dev = dev_get_drvdata(&op->dev); in mpc85xx_l2_err_remove()
617 struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info; in mpc85xx_l2_err_remove()
622 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, 0); in mpc85xx_l2_err_remove()
623 irq_dispose_mapping(pdata->irq); in mpc85xx_l2_err_remove()
626 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, orig_l2_err_disable); in mpc85xx_l2_err_remove()
627 edac_device_del_device(&op->dev); in mpc85xx_l2_err_remove()
634 { .compatible = "fsl,8540-l2-cache-controller", },
635 { .compatible = "fsl,8541-l2-cache-controller", },
636 { .compatible = "fsl,8544-l2-cache-controller", },
637 { .compatible = "fsl,8548-l2-cache-controller", },
638 { .compatible = "fsl,8555-l2-cache-controller", },
639 { .compatible = "fsl,8568-l2-cache-controller", },
640 { .compatible = "fsl,mpc8536-l2-cache-controller", },
641 { .compatible = "fsl,mpc8540-l2-cache-controller", },
642 { .compatible = "fsl,mpc8541-l2-cache-controller", },
643 { .compatible = "fsl,mpc8544-l2-cache-controller", },
644 { .compatible = "fsl,mpc8548-l2-cache-controller", },
645 { .compatible = "fsl,mpc8555-l2-cache-controller", },
646 { .compatible = "fsl,mpc8560-l2-cache-controller", },
647 { .compatible = "fsl,mpc8568-l2-cache-controller", },
648 { .compatible = "fsl,mpc8569-l2-cache-controller", },
649 { .compatible = "fsl,mpc8572-l2-cache-controller", },
650 { .compatible = "fsl,p1020-l2-cache-controller", },
651 { .compatible = "fsl,p1021-l2-cache-controller", },
652 { .compatible = "fsl,p2020-l2-cache-controller", },
670 * Taken from table 8-55 in the MPC8641 User's Manual and/or 9-61 in the
672 * 64-bit value, but split into an upper and lower 32-bit chunk. The labels
689 * Calculate the correct ECC value for a 64-bit value specified by high:low
720 * 'bit' failed. Eg generate an 8-bit codes seen in Table 8-55 in the MPC8641
721 * User's Manual and 9-61 in the MPC8572 User's Manual.
728 * Cycle through the upper or lower 32-bit portion of each value in in syndrome_from_bit()
730 * 64-bit data. in syndrome_from_bit()
740 * Note: This can only decode single-bit errors
748 *bad_data_bit = -1; in sbe_ecc_decode()
749 *bad_ecc_bit = -1; in sbe_ecc_decode()
776 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_check()
789 err_detect = in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT); in mpc85xx_mc_check()
798 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, err_detect); in mpc85xx_mc_check()
802 syndrome = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ECC); in mpc85xx_mc_check()
805 bus_width = (in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG) & in mpc85xx_mc_check()
812 err_addr = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_ADDRESS); in mpc85xx_mc_check()
815 for (row_index = 0; row_index < mci->nr_csrows; row_index++) { in mpc85xx_mc_check()
816 csrow = &mci->csrows[row_index]; in mpc85xx_mc_check()
817 if ((pfn >= csrow->first_page) && (pfn <= csrow->last_page)) in mpc85xx_mc_check()
821 cap_high = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_HI); in mpc85xx_mc_check()
822 cap_low = in_be32(pdata->mc_vbase + MPC85XX_MC_CAPTURE_DATA_LO); in mpc85xx_mc_check()
825 * Analyze single-bit errors on 64-bit wide buses in mpc85xx_mc_check()
826 * TODO: Add support for 32-bit wide buses in mpc85xx_mc_check()
832 if (bad_data_bit != -1) in mpc85xx_mc_check()
835 if (bad_ecc_bit != -1) in mpc85xx_mc_check()
841 cap_high ^ (1 << (bad_data_bit - 32)), in mpc85xx_mc_check()
853 if (row_index == mci->nr_csrows) in mpc85xx_mc_check()
858 syndrome, row_index, 0, mci->ctl_name); in mpc85xx_mc_check()
862 row_index, mci->ctl_name); in mpc85xx_mc_check()
864 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, err_detect); in mpc85xx_mc_check()
870 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_isr()
873 err_detect = in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT); in mpc85xx_mc_isr()
884 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_init_csrows()
892 sdram_ctl = in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG); in mpc85xx_init_csrows()
927 for (index = 0; index < mci->nr_csrows; index++) { in mpc85xx_init_csrows()
931 csrow = &mci->csrows[index]; in mpc85xx_init_csrows()
932 cs_bnds = in_be32(pdata->mc_vbase + MPC85XX_MC_CS_BNDS_0 + in mpc85xx_init_csrows()
941 start <<= (24 - PAGE_SHIFT); in mpc85xx_init_csrows()
942 end <<= (24 - PAGE_SHIFT); in mpc85xx_init_csrows()
943 end |= (1 << (24 - PAGE_SHIFT)) - 1; in mpc85xx_init_csrows()
945 csrow->first_page = start; in mpc85xx_init_csrows()
946 csrow->last_page = end; in mpc85xx_init_csrows()
947 csrow->nr_pages = end + 1 - start; in mpc85xx_init_csrows()
948 csrow->grain = 8; in mpc85xx_init_csrows()
949 csrow->mtype = mtype; in mpc85xx_init_csrows()
950 csrow->dtype = DEV_UNKNOWN; in mpc85xx_init_csrows()
952 csrow->dtype = DEV_X32; in mpc85xx_init_csrows()
953 csrow->edac_mode = EDAC_SECDED; in mpc85xx_init_csrows()
965 if (!devres_open_group(&op->dev, mpc85xx_mc_err_probe, GFP_KERNEL)) in mpc85xx_mc_err_probe()
966 return -ENOMEM; in mpc85xx_mc_err_probe()
970 devres_release_group(&op->dev, mpc85xx_mc_err_probe); in mpc85xx_mc_err_probe()
971 return -ENOMEM; in mpc85xx_mc_err_probe()
974 pdata = mci->pvt_info; in mpc85xx_mc_err_probe()
975 pdata->name = "mpc85xx_mc_err"; in mpc85xx_mc_err_probe()
976 pdata->irq = NO_IRQ; in mpc85xx_mc_err_probe()
977 mci->dev = &op->dev; in mpc85xx_mc_err_probe()
978 pdata->edac_idx = edac_mc_idx++; in mpc85xx_mc_err_probe()
979 dev_set_drvdata(mci->dev, mci); in mpc85xx_mc_err_probe()
980 mci->ctl_name = pdata->name; in mpc85xx_mc_err_probe()
981 mci->dev_name = pdata->name; in mpc85xx_mc_err_probe()
983 res = of_address_to_resource(op->dev.of_node, 0, &r); in mpc85xx_mc_err_probe()
990 if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r), in mpc85xx_mc_err_probe()
991 pdata->name)) { in mpc85xx_mc_err_probe()
994 res = -EBUSY; in mpc85xx_mc_err_probe()
998 pdata->mc_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r)); in mpc85xx_mc_err_probe()
999 if (!pdata->mc_vbase) { in mpc85xx_mc_err_probe()
1001 res = -ENOMEM; in mpc85xx_mc_err_probe()
1005 sdram_ctl = in_be32(pdata->mc_vbase + MPC85XX_MC_DDR_SDRAM_CFG); in mpc85xx_mc_err_probe()
1009 res = -ENODEV; in mpc85xx_mc_err_probe()
1014 mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_RDDR2 | in mpc85xx_mc_err_probe()
1016 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED; in mpc85xx_mc_err_probe()
1017 mci->edac_cap = EDAC_FLAG_SECDED; in mpc85xx_mc_err_probe()
1018 mci->mod_name = EDAC_MOD_STR; in mpc85xx_mc_err_probe()
1019 mci->mod_ver = MPC85XX_REVISION; in mpc85xx_mc_err_probe()
1022 mci->edac_check = mpc85xx_mc_check; in mpc85xx_mc_err_probe()
1024 mci->ctl_page_to_phys = NULL; in mpc85xx_mc_err_probe()
1026 mci->scrub_mode = SCRUB_SW_SRC; in mpc85xx_mc_err_probe()
1034 in_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE); in mpc85xx_mc_err_probe()
1035 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE, 0); in mpc85xx_mc_err_probe()
1038 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, ~0); in mpc85xx_mc_err_probe()
1046 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_INT_EN, in mpc85xx_mc_err_probe()
1050 orig_ddr_err_sbe = in_be32(pdata->mc_vbase + in mpc85xx_mc_err_probe()
1054 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_SBE, 0x10000); in mpc85xx_mc_err_probe()
1057 pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0); in mpc85xx_mc_err_probe()
1058 res = devm_request_irq(&op->dev, pdata->irq, in mpc85xx_mc_err_probe()
1064 "MPC85xx DRAM ERR\n", __func__, pdata->irq); in mpc85xx_mc_err_probe()
1065 irq_dispose_mapping(pdata->irq); in mpc85xx_mc_err_probe()
1066 res = -ENODEV; in mpc85xx_mc_err_probe()
1071 pdata->irq); in mpc85xx_mc_err_probe()
1074 devres_remove_group(&op->dev, mpc85xx_mc_err_probe); in mpc85xx_mc_err_probe()
1081 edac_mc_del_mc(&op->dev); in mpc85xx_mc_err_probe()
1083 devres_release_group(&op->dev, mpc85xx_mc_err_probe); in mpc85xx_mc_err_probe()
1090 struct mem_ctl_info *mci = dev_get_drvdata(&op->dev); in mpc85xx_mc_err_remove()
1091 struct mpc85xx_mc_pdata *pdata = mci->pvt_info; in mpc85xx_mc_err_remove()
1096 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_INT_EN, 0); in mpc85xx_mc_err_remove()
1097 irq_dispose_mapping(pdata->irq); in mpc85xx_mc_err_remove()
1100 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DISABLE, in mpc85xx_mc_err_remove()
1102 out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_SBE, orig_ddr_err_sbe); in mpc85xx_mc_err_remove()
1104 edac_mc_del_mc(&op->dev); in mpc85xx_mc_err_remove()
1111 { .compatible = "fsl,8540-memory-controller", },
1112 { .compatible = "fsl,8541-memory-controller", },
1113 { .compatible = "fsl,8544-memory-controller", },
1114 { .compatible = "fsl,8548-memory-controller", },
1115 { .compatible = "fsl,8555-memory-controller", },
1116 { .compatible = "fsl,8568-memory-controller", },
1117 { .compatible = "fsl,mpc8536-memory-controller", },
1118 { .compatible = "fsl,mpc8540-memory-controller", },
1119 { .compatible = "fsl,mpc8541-memory-controller", },
1120 { .compatible = "fsl,mpc8544-memory-controller", },
1121 { .compatible = "fsl,mpc8548-memory-controller", },
1122 { .compatible = "fsl,mpc8555-memory-controller", },
1123 { .compatible = "fsl,mpc8560-memory-controller", },
1124 { .compatible = "fsl,mpc8568-memory-controller", },
1125 { .compatible = "fsl,mpc8569-memory-controller", },
1126 { .compatible = "fsl,mpc8572-memory-controller", },
1127 { .compatible = "fsl,mpc8349-memory-controller", },
1128 { .compatible = "fsl,p1020-memory-controller", },
1129 { .compatible = "fsl,p1021-memory-controller", },
1130 { .compatible = "fsl,p2020-memory-controller", },
1131 { .compatible = "fsl,qoriq-memory-controller", },