Lines Matching +full:reg +full:- +full:names
18 * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
66 #define AMBASE 0x48 /* AMB Mem Mapped Reg Region Base */
81 #define FERR_FAT_FBDCHAN (3<<28) /* channel index where the highest-order error occurred */
86 /* Non-fatal error register */
138 * Error masks are according with Table 5-17 of i5400 datasheet
142 EMASK_M1 = 1<<0, /* Memory Write error on non-redundant retry */
143 EMASK_M2 = 1<<1, /* Memory or FB-DIMM configuration CRC read error */
146 EMASK_M5 = 1<<4, /* Aliased Uncorrectable Non-Mirrored Demand Data ECC */
148 EMASK_M7 = 1<<6, /* Aliased Uncorrectable Resilver- or Spare-Copy Data ECC */
150 EMASK_M9 = 1<<8, /* Non-Aliased Uncorrectable Non-Mirrored Demand Data ECC */
152 EMASK_M11 = 1<<10, /* Non-Aliased Uncorrectable Resilver- or Spare-Copy Data ECC */
153 EMASK_M12 = 1<<11, /* Non-Aliased Uncorrectable Patrol Data ECC */
155 EMASK_M14 = 1<<13, /* FB-DIMM Configuration Write error on first attempt */
156 EMASK_M15 = 1<<14, /* Memory or FB-DIMM configuration CRC read error */
157 EMASK_M16 = 1<<15, /* Channel Failed-Over Occurred */
158 EMASK_M17 = 1<<16, /* Correctable Non-Mirrored Demand Data ECC */
160 EMASK_M19 = 1<<18, /* Correctable Resilver- or Spare-Copy Data ECC */
162 EMASK_M21 = 1<<20, /* FB-DIMM Northbound parity error on FB-DIMM Sync Status */
164 EMASK_M23 = 1<<22, /* Non-Redundant Fast Reset Timeout */
169 EMASK_M28 = 1<<27, /* DIMM-Spare Copy Completed */
170 EMASK_M29 = 1<<28, /* DIMM-Isolation Completed */
174 * Names to translate bit error into something useful
177 [0] = "Memory Write error on non-redundant retry",
178 [1] = "Memory or FB-DIMM configuration CRC read error",
181 [4] = "Aliased Uncorrectable Non-Mirrored Demand Data ECC",
183 [6] = "Aliased Uncorrectable Resilver- or Spare-Copy Data ECC",
185 [8] = "Non-Aliased Uncorrectable Non-Mirrored Demand Data ECC",
187 [10] = "Non-Aliased Uncorrectable Resilver- or Spare-Copy Data ECC",
188 [11] = "Non-Aliased Uncorrectable Patrol Data ECC",
190 [13] = "FB-DIMM Configuration Write error on first attempt",
191 [14] = "Memory or FB-DIMM configuration CRC read error",
192 [15] = "Channel Failed-Over Occurred",
193 [16] = "Correctable Non-Mirrored Demand Data ECC",
195 [18] = "Correctable Resilver- or Spare-Copy Data ECC",
197 [20] = "FB-DIMM Northbound parity error on FB-DIMM Sync Status",
199 [22] = "Non-Redundant Fast Reset Timeout",
204 [27] = "DIMM-Spare Copy Completed",
205 [28] = "DIMM-Isolation Completed",
242 /* mask to all non-fatal errors */
260 /* masks for non-fatal error register */
269 (mask & ((1 << 28) - 1) << 3); /* Bits 0 to 27 */ in from_nf_ferr()
281 * MTRx - Memory Technology Registers
295 /* This applies to FERR_NF_FB-DIMM as well as FERR_FAT_FB-DIMM */
304 "8,192 - 13 rows",
305 "16,384 - 14 rows",
306 "32,768 - 15 rows",
307 "65,536 - 16 rows"
312 "1,024 - 10 columns",
313 "2,048 - 11 columns",
314 "4,096 - 12 columns",
350 u16 b0_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */
354 u16 b1_mtr[NUM_MTRS_PER_BRANCH]; /* Memory Technlogy Reg */
371 u32 ferr_nf_fbd; /* First Errors Non-Fatal */
372 u32 nerr_nf_fbd; /* Next Errors Non-Fatal */
379 /* These registers are input ONLY if there was a Non-Rec Error */
380 u16 nrecmema; /* Non-Recoverable Mem log A */
381 u16 nrecmemb; /* Non-Recoverable Mem log B */
389 return ((info->nrecmema) >> 12) & 0x7; in nrec_bank()
393 return ((info->nrecmema) >> 8) & 0xf; in nrec_rank()
397 return ((info->nrecmema)) & 0xff; in nrec_buf_id()
401 return (info->nrecmemb) >> 31; in nrec_rdwr()
411 return ((info->nrecmemb) >> 16) & 0x1fff; in nrec_cas()
415 return (info->nrecmemb) & 0xffff; in nrec_ras()
419 return ((info->recmema) >> 12) & 0x7; in rec_bank()
423 return ((info->recmema) >> 8) & 0xf; in rec_rank()
427 return (info->recmemb) >> 31; in rec_rdwr()
431 return ((info->recmemb) >> 16) & 0x1fff; in rec_cas()
435 return (info->recmemb) & 0xffff; in rec_ras()
451 pvt = mci->pvt_info; in i5400_get_error_info()
454 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value); in i5400_get_error_info()
464 info->ferr_fat_fbd = value; in i5400_get_error_info()
467 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
468 NERR_FAT_FBD, &info->nerr_fat_fbd); in i5400_get_error_info()
469 pci_read_config_word(pvt->branchmap_werrors, in i5400_get_error_info()
470 NRECMEMA, &info->nrecmema); in i5400_get_error_info()
471 pci_read_config_word(pvt->branchmap_werrors, in i5400_get_error_info()
472 NRECMEMB, &info->nrecmemb); in i5400_get_error_info()
475 pci_write_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
478 info->ferr_fat_fbd = 0; in i5400_get_error_info()
479 info->nerr_fat_fbd = 0; in i5400_get_error_info()
480 info->nrecmema = 0; in i5400_get_error_info()
481 info->nrecmemb = 0; in i5400_get_error_info()
484 /* read in the 1st NON-FATAL error register */ in i5400_get_error_info()
485 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value); in i5400_get_error_info()
487 /* If there is an error, then read in the 1st NON-FATAL error in i5400_get_error_info()
490 info->ferr_nf_fbd = value; in i5400_get_error_info()
493 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
494 NERR_NF_FBD, &info->nerr_nf_fbd); in i5400_get_error_info()
495 pci_read_config_word(pvt->branchmap_werrors, in i5400_get_error_info()
496 RECMEMA, &info->recmema); in i5400_get_error_info()
497 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
498 RECMEMB, &info->recmemb); in i5400_get_error_info()
499 pci_read_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
500 REDMEMB, &info->redmemb); in i5400_get_error_info()
503 pci_write_config_dword(pvt->branchmap_werrors, in i5400_get_error_info()
506 info->ferr_nf_fbd = 0; in i5400_get_error_info()
507 info->nerr_nf_fbd = 0; in i5400_get_error_info()
508 info->recmema = 0; in i5400_get_error_info()
509 info->recmemb = 0; in i5400_get_error_info()
510 info->redmemb = 0; in i5400_get_error_info()
542 type = "NON-FATAL uncorrected"; in i5400_proccess_non_recoverable_info()
544 type = "NON-FATAL recoverable"; in i5400_proccess_non_recoverable_info()
548 branch = extract_fbdchan_indx(info->ferr_fat_fbd); in i5400_proccess_non_recoverable_info()
551 /* Use the NON-Recoverable macros to extract data */ in i5400_proccess_non_recoverable_info()
569 "%s (Branch=%d DRAM-Bank=%d Buffer ID = %d RDWR=%s " in i5400_proccess_non_recoverable_info()
583 * handle the Intel NON-FATAL errors, if any
599 allErrors = from_nf_ferr(info->ferr_nf_fbd & FERR_NF_MASK); in i5400_process_nonfatal_error_info()
614 branch = extract_fbdchan_indx(info->ferr_nf_fbd); in i5400_process_nonfatal_error_info()
617 if (REC_ECC_LOCATOR_ODD(info->redmemb)) in i5400_process_nonfatal_error_info()
640 "Corrected error (Branch=%d DRAM-Bank=%d RDWR=%s " in i5400_process_nonfatal_error_info()
654 branch = extract_fbdchan_indx(info->ferr_nf_fbd); in i5400_process_nonfatal_error_info()
657 "Non-Fatal misc error (Branch=%d Err=%#lx (%s))", in i5400_process_nonfatal_error_info()
670 allErrors = (info->ferr_fat_fbd & FERR_FAT_MASK); in i5400_process_error_info()
673 /* now handle any non-fatal errors that occurred */ in i5400_process_error_info()
697 debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__); in i5400_check_error()
710 pvt = mci->pvt_info; in i5400_put_devices()
713 pci_dev_put(pvt->branch_1); in i5400_put_devices()
714 pci_dev_put(pvt->branch_0); in i5400_put_devices()
715 pci_dev_put(pvt->fsb_error_regs); in i5400_put_devices()
716 pci_dev_put(pvt->branchmap_werrors); in i5400_put_devices()
730 pvt = mci->pvt_info; in i5400_get_devices()
731 pvt->branchmap_werrors = NULL; in i5400_get_devices()
732 pvt->fsb_error_regs = NULL; in i5400_get_devices()
733 pvt->branch_0 = NULL; in i5400_get_devices()
734 pvt->branch_1 = NULL; in i5400_get_devices()
738 while (!pvt->branchmap_werrors || !pvt->fsb_error_regs) { in i5400_get_devices()
754 switch (PCI_FUNC(pdev->devfn)) { in i5400_get_devices()
756 pvt->branchmap_werrors = pdev; in i5400_get_devices()
759 pvt->fsb_error_regs = pdev; in i5400_get_devices()
764 debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
765 pci_name(pvt->system_address), in i5400_get_devices()
766 pvt->system_address->vendor, pvt->system_address->device); in i5400_get_devices()
767 debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
768 pci_name(pvt->branchmap_werrors), in i5400_get_devices()
769 pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device); in i5400_get_devices()
770 debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices()
771 pci_name(pvt->fsb_error_regs), in i5400_get_devices()
772 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device); in i5400_get_devices()
774 pvt->branch_0 = pci_get_device(PCI_VENDOR_ID_INTEL, in i5400_get_devices()
776 if (!pvt->branch_0) { in i5400_get_devices()
787 if (pvt->maxch < CHANNELS_PER_BRANCH) in i5400_get_devices()
790 pvt->branch_1 = pci_get_device(PCI_VENDOR_ID_INTEL, in i5400_get_devices()
792 if (!pvt->branch_1) { in i5400_get_devices()
806 return -ENODEV; in i5400_get_devices()
828 amb_present = pvt->b0_ambpresent1; in determine_amb_present_reg()
830 amb_present = pvt->b0_ambpresent0; in determine_amb_present_reg()
833 amb_present = pvt->b1_ambpresent1; in determine_amb_present_reg()
835 amb_present = pvt->b1_ambpresent0; in determine_amb_present_reg()
851 /* There is one MTR for each slot pair of FB-DIMMs, in determine_mtr()
863 mtr = pvt->b0_mtr[n]; in determine_mtr()
865 mtr = pvt->b1_mtr[n]; in determine_mtr()
918 addrBits -= 20; /* divide by 2^^20 */ in handle_channel()
919 addrBits -= 3; /* 8 bits per bytes */ in handle_channel()
921 dinfo->megabytes = 1 << addrBits; in handle_channel()
954 max_csrows = pvt->maxdimmperch; in calculate_dimm_size()
955 for (csrow = max_csrows - 1; csrow >= 0; csrow--) { in calculate_dimm_size()
960 n = snprintf(p, space, "---------------------------" in calculate_dimm_size()
961 "--------------------------------"); in calculate_dimm_size()
963 space -= n; in calculate_dimm_size()
970 space -= n; in calculate_dimm_size()
972 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
973 dinfo = &pvt->dimm_info[csrow][channel]; in calculate_dimm_size()
975 n = snprintf(p, space, "%4d MB | ", dinfo->megabytes); in calculate_dimm_size()
977 space -= n; in calculate_dimm_size()
985 n = snprintf(p, space, "---------------------------" in calculate_dimm_size()
986 "--------------------------------"); in calculate_dimm_size()
988 space -= n; in calculate_dimm_size()
996 space -= n; in calculate_dimm_size()
997 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
1000 space -= n; in calculate_dimm_size()
1024 pvt = mci->pvt_info; in i5400_get_mc_regs()
1026 pci_read_config_dword(pvt->system_address, AMBASE, in i5400_get_mc_regs()
1027 (u32 *) &pvt->ambase); in i5400_get_mc_regs()
1028 pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32), in i5400_get_mc_regs()
1029 ((u32 *) &pvt->ambase) + sizeof(u32)); in i5400_get_mc_regs()
1031 maxdimmperch = pvt->maxdimmperch; in i5400_get_mc_regs()
1032 maxch = pvt->maxch; in i5400_get_mc_regs()
1034 debugf2("AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n", in i5400_get_mc_regs()
1035 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch); in i5400_get_mc_regs()
1038 pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm); in i5400_get_mc_regs()
1039 pvt->tolm >>= 12; in i5400_get_mc_regs()
1040 debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm, in i5400_get_mc_regs()
1041 pvt->tolm); in i5400_get_mc_regs()
1043 actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28)); in i5400_get_mc_regs()
1045 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28); in i5400_get_mc_regs()
1047 pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0); in i5400_get_mc_regs()
1048 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1); in i5400_get_mc_regs()
1050 /* Get the MIR[0-1] regs */ in i5400_get_mc_regs()
1051 limit = (pvt->mir0 >> 4) & 0x0fff; in i5400_get_mc_regs()
1052 way0 = pvt->mir0 & 0x1; in i5400_get_mc_regs()
1053 way1 = pvt->mir0 & 0x2; in i5400_get_mc_regs()
1055 limit = (pvt->mir1 >> 4) & 0xfff; in i5400_get_mc_regs()
1056 way0 = pvt->mir1 & 0x1; in i5400_get_mc_regs()
1057 way1 = pvt->mir1 & 0x2; in i5400_get_mc_regs()
1060 /* Get the set of MTR[0-3] regs by each branch */ in i5400_get_mc_regs()
1065 pci_read_config_word(pvt->branch_0, where, in i5400_get_mc_regs()
1066 &pvt->b0_mtr[slot_row]); in i5400_get_mc_regs()
1069 pvt->b0_mtr[slot_row]); in i5400_get_mc_regs()
1071 if (pvt->maxch < CHANNELS_PER_BRANCH) { in i5400_get_mc_regs()
1072 pvt->b1_mtr[slot_row] = 0; in i5400_get_mc_regs()
1077 pci_read_config_word(pvt->branch_1, where, in i5400_get_mc_regs()
1078 &pvt->b1_mtr[slot_row]); in i5400_get_mc_regs()
1080 pvt->b1_mtr[slot_row]); in i5400_get_mc_regs()
1087 decode_mtr(slot_row, pvt->b0_mtr[slot_row]); in i5400_get_mc_regs()
1089 pci_read_config_word(pvt->branch_0, AMBPRESENT_0, in i5400_get_mc_regs()
1090 &pvt->b0_ambpresent0); in i5400_get_mc_regs()
1091 debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0); in i5400_get_mc_regs()
1092 pci_read_config_word(pvt->branch_0, AMBPRESENT_1, in i5400_get_mc_regs()
1093 &pvt->b0_ambpresent1); in i5400_get_mc_regs()
1094 debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1); in i5400_get_mc_regs()
1097 if (pvt->maxch < CHANNELS_PER_BRANCH) { in i5400_get_mc_regs()
1098 pvt->b1_ambpresent0 = 0; in i5400_get_mc_regs()
1099 pvt->b1_ambpresent1 = 0; in i5400_get_mc_regs()
1104 decode_mtr(slot_row, pvt->b1_mtr[slot_row]); in i5400_get_mc_regs()
1106 pci_read_config_word(pvt->branch_1, AMBPRESENT_0, in i5400_get_mc_regs()
1107 &pvt->b1_ambpresent0); in i5400_get_mc_regs()
1108 debugf2("\t\tAMB-Branch 1-present0 0x%x:\n", in i5400_get_mc_regs()
1109 pvt->b1_ambpresent0); in i5400_get_mc_regs()
1110 pci_read_config_word(pvt->branch_1, AMBPRESENT_1, in i5400_get_mc_regs()
1111 &pvt->b1_ambpresent1); in i5400_get_mc_regs()
1112 debugf2("\t\tAMB-Branch 1-present1 0x%x:\n", in i5400_get_mc_regs()
1113 pvt->b1_ambpresent1); in i5400_get_mc_regs()
1141 pvt = mci->pvt_info; in i5400_init_csrows()
1143 channel_count = pvt->maxch; in i5400_init_csrows()
1144 max_csrows = pvt->maxdimmperch; in i5400_init_csrows()
1149 p_csrow = &mci->csrows[csrow]; in i5400_init_csrows()
1151 p_csrow->csrow_idx = csrow; in i5400_init_csrows()
1161 p_csrow->first_page = 0 + csrow * 20; in i5400_init_csrows()
1162 p_csrow->last_page = 9 + csrow * 20; in i5400_init_csrows()
1163 p_csrow->page_mask = 0xFFF; in i5400_init_csrows()
1165 p_csrow->grain = 8; in i5400_init_csrows()
1168 for (channel = 0; channel < pvt->maxch; channel++) in i5400_init_csrows()
1169 csrow_megs += pvt->dimm_info[csrow][channel].megabytes; in i5400_init_csrows()
1171 p_csrow->nr_pages = csrow_megs << 8; in i5400_init_csrows()
1174 p_csrow->mtype = MEM_FB_DDR2; in i5400_init_csrows()
1178 p_csrow->dtype = DEV_X8; in i5400_init_csrows()
1180 p_csrow->dtype = DEV_X4; in i5400_init_csrows()
1182 p_csrow->edac_mode = EDAC_S8ECD8ED; in i5400_init_csrows()
1199 pvt = mci->pvt_info; in i5400_enable_error_reporting()
1202 pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5400_enable_error_reporting()
1208 pci_write_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5400_enable_error_reporting()
1228 return -EINVAL; in i5400_probe1()
1232 pdev->bus->number, in i5400_probe1()
1233 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); in i5400_probe1()
1236 if (PCI_FUNC(pdev->devfn) != 0) in i5400_probe1()
1237 return -ENODEV; in i5400_probe1()
1250 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", in i5400_probe1()
1257 return -ENOMEM; in i5400_probe1()
1261 mci->dev = &pdev->dev; /* record ptr to the generic device */ in i5400_probe1()
1263 pvt = mci->pvt_info; in i5400_probe1()
1264 pvt->system_address = pdev; /* Record this device in our private */ in i5400_probe1()
1265 pvt->maxch = num_channels; in i5400_probe1()
1266 pvt->maxdimmperch = num_dimms_per_channel; in i5400_probe1()
1275 mci->mc_idx = 0; in i5400_probe1()
1276 mci->mtype_cap = MEM_FLAG_FB_DDR2; in i5400_probe1()
1277 mci->edac_ctl_cap = EDAC_FLAG_NONE; in i5400_probe1()
1278 mci->edac_cap = EDAC_FLAG_NONE; in i5400_probe1()
1279 mci->mod_name = "i5400_edac.c"; in i5400_probe1()
1280 mci->mod_ver = I5400_REVISION; in i5400_probe1()
1281 mci->ctl_name = i5400_devs[dev_idx].ctl_name; in i5400_probe1()
1282 mci->dev_name = pci_name(pdev); in i5400_probe1()
1283 mci->ctl_page_to_phys = NULL; in i5400_probe1()
1286 mci->edac_check = i5400_check_error; in i5400_probe1()
1291 debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" in i5400_probe1()
1294 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ in i5400_probe1()
1313 i5400_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i5400_probe1()
1332 return -ENODEV; in i5400_probe1()
1355 return i5400_probe1(pdev, id->driver_data); in i5400_init_one()
1371 mci = edac_mc_del_mc(&pdev->dev); in i5400_remove_one()
1439 MODULE_DESCRIPTION("MC Driver for Intel I5400 memory controllers - "