Lines Matching +full:ras +full:- +full:to +full:- +full:cas
12 * Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
102 /* Non-Retry or redundant Retry errors */
275 /* Defines to extract the vaious fields from the
276 * MTRx - Memory Technology Registers
291 "8,192 - 13 rows",
292 "16,384 - 14 rows",
293 "32,768 - 15 rows",
298 "1,024 - 10 columns",
299 "2,048 - 11 columns",
300 "4,096 - 12 columns",
305 /* enables the report of miscellaneous messages as CE errors - default off */
372 u32 ferr_nf_fbd; /* First Errors Non-Fatal */
373 u32 nerr_nf_fbd; /* Next Errors Non-Fatal */
381 * Non-Recoverable Error */
382 u16 nrecmema; /* Non-Recoverable Mem log A */
383 u16 nrecmemb; /* Non-Recoverable Mem log B */
400 pvt = mci->pvt_info; in i5000_get_error_info()
403 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value); in i5000_get_error_info()
412 info->ferr_fat_fbd = value; in i5000_get_error_info()
415 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
416 NERR_FAT_FBD, &info->nerr_fat_fbd); in i5000_get_error_info()
417 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info()
418 NRECMEMA, &info->nrecmema); in i5000_get_error_info()
419 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info()
420 NRECMEMB, &info->nrecmemb); in i5000_get_error_info()
423 pci_write_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
426 info->ferr_fat_fbd = 0; in i5000_get_error_info()
427 info->nerr_fat_fbd = 0; in i5000_get_error_info()
428 info->nrecmema = 0; in i5000_get_error_info()
429 info->nrecmemb = 0; in i5000_get_error_info()
432 /* read in the 1st NON-FATAL error register */ in i5000_get_error_info()
433 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value); in i5000_get_error_info()
435 /* If there is an error, then read in the 1st NON-FATAL error in i5000_get_error_info()
438 info->ferr_nf_fbd = value; in i5000_get_error_info()
441 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
442 NERR_NF_FBD, &info->nerr_nf_fbd); in i5000_get_error_info()
443 pci_read_config_word(pvt->branchmap_werrors, in i5000_get_error_info()
444 RECMEMA, &info->recmema); in i5000_get_error_info()
445 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
446 RECMEMB, &info->recmemb); in i5000_get_error_info()
447 pci_read_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
448 REDMEMB, &info->redmemb); in i5000_get_error_info()
451 pci_write_config_dword(pvt->branchmap_werrors, in i5000_get_error_info()
454 info->ferr_nf_fbd = 0; in i5000_get_error_info()
455 info->nerr_nf_fbd = 0; in i5000_get_error_info()
456 info->recmema = 0; in i5000_get_error_info()
457 info->recmemb = 0; in i5000_get_error_info()
458 info->redmemb = 0; in i5000_get_error_info()
481 int ras, cas; in i5000_process_fatal_error_info() local
484 allErrors = (info->ferr_fat_fbd & FERR_FAT_MASK); in i5000_process_fatal_error_info()
488 branch = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd); in i5000_process_fatal_error_info()
491 /* Use the NON-Recoverable macros to extract data */ in i5000_process_fatal_error_info()
492 bank = NREC_BANK(info->nrecmema); in i5000_process_fatal_error_info()
493 rank = NREC_RANK(info->nrecmema); in i5000_process_fatal_error_info()
494 rdwr = NREC_RDWR(info->nrecmema); in i5000_process_fatal_error_info()
495 ras = NREC_RAS(info->nrecmemb); in i5000_process_fatal_error_info()
496 cas = NREC_CAS(info->nrecmemb); in i5000_process_fatal_error_info()
499 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info()
501 rdwr ? "Write" : "Read", ras, cas); in i5000_process_fatal_error_info()
506 specific = "Alert on non-redundant retry or fast " in i5000_process_fatal_error_info()
510 specific = "Northbound CRC error on non-redundant " in i5000_process_fatal_error_info()
518 * This error is generated to inform that the intelligent in i5000_process_fatal_error_info()
521 * should take care of, we'll warn only once to avoid in i5000_process_fatal_error_info()
536 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d " in i5000_process_fatal_error_info()
538 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, in i5000_process_fatal_error_info()
541 /* Call the helper to output message */ in i5000_process_fatal_error_info()
550 * handle the Intel NON-FATAL errors, if any
567 int ras, cas; in i5000_process_nonfatal_error_info() local
570 allErrors = (info->ferr_nf_fbd & FERR_NF_MASK); in i5000_process_nonfatal_error_info()
579 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
583 * for errors M4Err-M12Err and M17Err-M21Err, on FERR_NF_FBD in i5000_process_nonfatal_error_info()
587 bank = NREC_BANK(info->nrecmema); in i5000_process_nonfatal_error_info()
588 rank = NREC_RANK(info->nrecmema); in i5000_process_nonfatal_error_info()
589 rdwr = NREC_RDWR(info->nrecmema); in i5000_process_nonfatal_error_info()
590 ras = NREC_RAS(info->nrecmemb); in i5000_process_nonfatal_error_info()
591 cas = NREC_CAS(info->nrecmemb); in i5000_process_nonfatal_error_info()
595 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
597 rdwr ? "Write" : "Read", ras, cas); in i5000_process_nonfatal_error_info()
601 specific = "Non-Aliased Uncorrectable Patrol Data ECC"; in i5000_process_nonfatal_error_info()
604 specific = "Non-Aliased Uncorrectable Spare-Copy " in i5000_process_nonfatal_error_info()
608 specific = "Non-Aliased Uncorrectable Mirrored Demand " in i5000_process_nonfatal_error_info()
612 specific = "Non-Aliased Uncorrectable Non-Mirrored " in i5000_process_nonfatal_error_info()
619 specific = "Aliased Uncorrectable Spare-Copy Data ECC"; in i5000_process_nonfatal_error_info()
626 specific = "Aliased Uncorrectable Non-Mirrored Demand " in i5000_process_nonfatal_error_info()
636 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " in i5000_process_nonfatal_error_info()
637 "CAS=%d, UE Err=0x%x (%s))", in i5000_process_nonfatal_error_info()
638 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas, in i5000_process_nonfatal_error_info()
641 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
650 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
653 if (REC_ECC_LOCATOR_ODD(info->redmemb)) in i5000_process_nonfatal_error_info()
656 /* Convert channel to be based from zero, instead of in i5000_process_nonfatal_error_info()
660 bank = REC_BANK(info->recmema); in i5000_process_nonfatal_error_info()
661 rank = REC_RANK(info->recmema); in i5000_process_nonfatal_error_info()
662 rdwr = REC_RDWR(info->recmema); in i5000_process_nonfatal_error_info()
663 ras = REC_RAS(info->recmemb); in i5000_process_nonfatal_error_info()
664 cas = REC_CAS(info->recmemb); in i5000_process_nonfatal_error_info()
667 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info()
669 rdwr ? "Write" : "Read", ras, cas); in i5000_process_nonfatal_error_info()
673 specific = "Correctable Non-Mirrored Demand Data ECC"; in i5000_process_nonfatal_error_info()
679 specific = "Correctable Spare-Copy Data ECC"; in i5000_process_nonfatal_error_info()
688 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d " in i5000_process_nonfatal_error_info()
689 "CAS=%d, CE Err=0x%x (%s))", branch >> 1, bank, in i5000_process_nonfatal_error_info()
690 rdwr ? "Write" : "Read", ras, cas, ce_errors, in i5000_process_nonfatal_error_info()
693 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
705 specific = "Non-Retry or Redundant Retry FBD Memory " in i5000_process_nonfatal_error_info()
709 specific = "Non-Retry or Redundant Retry FBD " in i5000_process_nonfatal_error_info()
713 specific = "Non-Retry or Redundant Retry FBD " in i5000_process_nonfatal_error_info()
724 specific = "DIMM-spare copy started"; in i5000_process_nonfatal_error_info()
727 specific = "DIMM-spare copy completed"; in i5000_process_nonfatal_error_info()
730 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd); in i5000_process_nonfatal_error_info()
737 /* Call the helper to output message */ in i5000_process_nonfatal_error_info()
753 /* now handle any non-fatal errors that occurred */ in i5000_process_error_info()
777 debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__); in i5000_check_error()
784 * device/functions we want to reference for this driver
786 * Need to 'get' device 16 func 1 and func 2
794 pvt = mci->pvt_info; in i5000_get_devices()
796 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
816 if (PCI_FUNC(pdev->devfn) == 1) in i5000_get_devices()
820 pvt->branchmap_werrors = pdev; in i5000_get_devices()
822 /* Attempt to 'get' the MCH register we want */ in i5000_get_devices()
837 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
842 if (PCI_FUNC(pdev->devfn) == 2) in i5000_get_devices()
846 pvt->fsb_error_regs = pdev; in i5000_get_devices()
848 debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
849 pci_name(pvt->system_address), in i5000_get_devices()
850 pvt->system_address->vendor, pvt->system_address->device); in i5000_get_devices()
851 debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
852 pci_name(pvt->branchmap_werrors), in i5000_get_devices()
853 pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device); in i5000_get_devices()
854 debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices()
855 pci_name(pvt->fsb_error_regs), in i5000_get_devices()
856 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device); in i5000_get_devices()
868 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
869 pci_dev_put(pvt->fsb_error_regs); in i5000_get_devices()
873 pvt->branch_0 = pdev; in i5000_get_devices()
875 /* If this device claims to have more than 2 channels then in i5000_get_devices()
878 if (pvt->maxch >= CHANNELS_PER_BRANCH) { in i5000_get_devices()
891 pci_dev_put(pvt->branchmap_werrors); in i5000_get_devices()
892 pci_dev_put(pvt->fsb_error_regs); in i5000_get_devices()
893 pci_dev_put(pvt->branch_0); in i5000_get_devices()
897 pvt->branch_1 = pdev; in i5000_get_devices()
911 pvt = mci->pvt_info; in i5000_put_devices()
913 pci_dev_put(pvt->branchmap_werrors); /* FUNC 1 */ in i5000_put_devices()
914 pci_dev_put(pvt->fsb_error_regs); /* FUNC 2 */ in i5000_put_devices()
915 pci_dev_put(pvt->branch_0); /* DEV 21 */ in i5000_put_devices()
918 if (pvt->maxch >= CHANNELS_PER_BRANCH) in i5000_put_devices()
919 pci_dev_put(pvt->branch_1); /* DEV 22 */ in i5000_put_devices()
941 amb_present = pvt->b0_ambpresent1; in determine_amb_present_reg()
943 amb_present = pvt->b0_ambpresent0; in determine_amb_present_reg()
946 amb_present = pvt->b1_ambpresent1; in determine_amb_present_reg()
948 amb_present = pvt->b1_ambpresent0; in determine_amb_present_reg()
964 mtr = pvt->b0_mtr[csrow >> 1]; in determine_mtr()
966 mtr = pvt->b1_mtr[csrow >> 1]; in determine_mtr()
1004 dinfo->dual_rank = MTR_DIMM_RANK(mtr); in handle_channel()
1006 if (!((dinfo->dual_rank == 0) && in handle_channel()
1017 addrBits -= 20; /* divide by 2^^20 */ in handle_channel()
1018 addrBits -= 3; /* 8 bits per bytes */ in handle_channel()
1020 dinfo->megabytes = 1 << addrBits; in handle_channel()
1051 space -= n; in calculate_dimm_size()
1055 * Start with the highest csrow first, to display it first in calculate_dimm_size()
1058 max_csrows = pvt->maxdimmperch * 2; in calculate_dimm_size()
1059 for (csrow = max_csrows - 1; csrow >= 0; csrow--) { in calculate_dimm_size()
1064 n = snprintf(p, space, "---------------------------" in calculate_dimm_size()
1065 "--------------------------------"); in calculate_dimm_size()
1067 space -= n; in calculate_dimm_size()
1074 space -= n; in calculate_dimm_size()
1076 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
1077 dinfo = &pvt->dimm_info[csrow][channel]; in calculate_dimm_size()
1079 n = snprintf(p, space, "%4d MB | ", dinfo->megabytes); in calculate_dimm_size()
1081 space -= n; in calculate_dimm_size()
1085 space -= n; in calculate_dimm_size()
1089 n = snprintf(p, space, "---------------------------" in calculate_dimm_size()
1090 "--------------------------------\n"); in calculate_dimm_size()
1092 space -= n; in calculate_dimm_size()
1097 space -= n; in calculate_dimm_size()
1098 for (channel = 0; channel < pvt->maxch; channel++) { in calculate_dimm_size()
1101 space -= n; in calculate_dimm_size()
1105 space -= n; in calculate_dimm_size()
1128 pvt = mci->pvt_info; in i5000_get_mc_regs()
1130 pci_read_config_dword(pvt->system_address, AMBASE, in i5000_get_mc_regs()
1131 (u32 *) & pvt->ambase); in i5000_get_mc_regs()
1132 pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32), in i5000_get_mc_regs()
1133 ((u32 *) & pvt->ambase) + sizeof(u32)); in i5000_get_mc_regs()
1135 maxdimmperch = pvt->maxdimmperch; in i5000_get_mc_regs()
1136 maxch = pvt->maxch; in i5000_get_mc_regs()
1138 debugf2("AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n", in i5000_get_mc_regs()
1139 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch); in i5000_get_mc_regs()
1142 pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm); in i5000_get_mc_regs()
1143 pvt->tolm >>= 12; in i5000_get_mc_regs()
1144 debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm, in i5000_get_mc_regs()
1145 pvt->tolm); in i5000_get_mc_regs()
1147 actual_tolm = pvt->tolm << 28; in i5000_get_mc_regs()
1150 pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0); in i5000_get_mc_regs()
1151 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1); in i5000_get_mc_regs()
1152 pci_read_config_word(pvt->branchmap_werrors, MIR2, &pvt->mir2); in i5000_get_mc_regs()
1154 /* Get the MIR[0-2] regs */ in i5000_get_mc_regs()
1155 limit = (pvt->mir0 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1156 way0 = pvt->mir0 & 0x1; in i5000_get_mc_regs()
1157 way1 = pvt->mir0 & 0x2; in i5000_get_mc_regs()
1159 limit = (pvt->mir1 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1160 way0 = pvt->mir1 & 0x1; in i5000_get_mc_regs()
1161 way1 = pvt->mir1 & 0x2; in i5000_get_mc_regs()
1163 limit = (pvt->mir2 >> 4) & 0x0FFF; in i5000_get_mc_regs()
1164 way0 = pvt->mir2 & 0x1; in i5000_get_mc_regs()
1165 way1 = pvt->mir2 & 0x2; in i5000_get_mc_regs()
1168 /* Get the MTR[0-3] regs */ in i5000_get_mc_regs()
1172 pci_read_config_word(pvt->branch_0, where, in i5000_get_mc_regs()
1173 &pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1176 pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1178 if (pvt->maxch >= CHANNELS_PER_BRANCH) { in i5000_get_mc_regs()
1179 pci_read_config_word(pvt->branch_1, where, in i5000_get_mc_regs()
1180 &pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1182 where, pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1184 pvt->b1_mtr[slot_row] = 0; in i5000_get_mc_regs()
1192 decode_mtr(slot_row, pvt->b0_mtr[slot_row]); in i5000_get_mc_regs()
1194 pci_read_config_word(pvt->branch_0, AMB_PRESENT_0, in i5000_get_mc_regs()
1195 &pvt->b0_ambpresent0); in i5000_get_mc_regs()
1196 debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0); in i5000_get_mc_regs()
1197 pci_read_config_word(pvt->branch_0, AMB_PRESENT_1, in i5000_get_mc_regs()
1198 &pvt->b0_ambpresent1); in i5000_get_mc_regs()
1199 debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1); in i5000_get_mc_regs()
1202 if (pvt->maxch < CHANNELS_PER_BRANCH) { in i5000_get_mc_regs()
1203 pvt->b1_ambpresent0 = 0; in i5000_get_mc_regs()
1204 pvt->b1_ambpresent1 = 0; in i5000_get_mc_regs()
1209 decode_mtr(slot_row, pvt->b1_mtr[slot_row]); in i5000_get_mc_regs()
1211 pci_read_config_word(pvt->branch_1, AMB_PRESENT_0, in i5000_get_mc_regs()
1212 &pvt->b1_ambpresent0); in i5000_get_mc_regs()
1213 debugf2("\t\tAMB-Branch 1-present0 0x%x:\n", in i5000_get_mc_regs()
1214 pvt->b1_ambpresent0); in i5000_get_mc_regs()
1215 pci_read_config_word(pvt->branch_1, AMB_PRESENT_1, in i5000_get_mc_regs()
1216 &pvt->b1_ambpresent1); in i5000_get_mc_regs()
1217 debugf2("\t\tAMB-Branch 1-present1 0x%x:\n", in i5000_get_mc_regs()
1218 pvt->b1_ambpresent1); in i5000_get_mc_regs()
1246 pvt = mci->pvt_info; in i5000_init_csrows()
1248 channel_count = pvt->maxch; in i5000_init_csrows()
1249 max_csrows = pvt->maxdimmperch * 2; in i5000_init_csrows()
1254 p_csrow = &mci->csrows[csrow]; in i5000_init_csrows()
1256 p_csrow->csrow_idx = csrow; in i5000_init_csrows()
1259 mtr = pvt->b0_mtr[csrow >> 1]; in i5000_init_csrows()
1260 mtr1 = pvt->b1_mtr[csrow >> 1]; in i5000_init_csrows()
1267 p_csrow->first_page = 0 + csrow * 20; in i5000_init_csrows()
1268 p_csrow->last_page = 9 + csrow * 20; in i5000_init_csrows()
1269 p_csrow->page_mask = 0xFFF; in i5000_init_csrows()
1271 p_csrow->grain = 8; in i5000_init_csrows()
1274 for (channel = 0; channel < pvt->maxch; channel++) { in i5000_init_csrows()
1275 csrow_megs += pvt->dimm_info[csrow][channel].megabytes; in i5000_init_csrows()
1278 p_csrow->nr_pages = csrow_megs << 8; in i5000_init_csrows()
1281 p_csrow->mtype = MEM_FB_DDR2; in i5000_init_csrows()
1285 p_csrow->dtype = DEV_X8; in i5000_init_csrows()
1287 p_csrow->dtype = DEV_X4; in i5000_init_csrows()
1289 p_csrow->edac_mode = EDAC_S8ECD8ED; in i5000_init_csrows()
1306 pvt = mci->pvt_info; in i5000_enable_error_reporting()
1309 pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5000_enable_error_reporting()
1315 pci_write_config_dword(pvt->branchmap_werrors, EMASK_FBD, in i5000_enable_error_reporting()
1331 /* Need to retrieve just how many channels and dimms per channel are in i5000_get_dimm_and_channel_counts()
1342 * i5000_probe1 Probe for ONE instance of device to see if it is
1358 pdev->bus->number, in i5000_probe1()
1359 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); in i5000_probe1()
1362 if (PCI_FUNC(pdev->devfn) != 0) in i5000_probe1()
1363 return -ENODEV; in i5000_probe1()
1369 * or equal to what the motherboard manufacturer will implement. in i5000_probe1()
1371 * As we don't have a motherboard identification routine to determine in i5000_probe1()
1375 * allows the driver to support up to the chipset max, without in i5000_probe1()
1382 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", in i5000_probe1()
1389 return -ENOMEM; in i5000_probe1()
1391 kobject_get(&mci->edac_mci_kobj); in i5000_probe1()
1394 mci->dev = &pdev->dev; /* record ptr to the generic device */ in i5000_probe1()
1396 pvt = mci->pvt_info; in i5000_probe1()
1397 pvt->system_address = pdev; /* Record this device in our private */ in i5000_probe1()
1398 pvt->maxch = num_channels; in i5000_probe1()
1399 pvt->maxdimmperch = num_dimms_per_channel; in i5000_probe1()
1401 /* 'get' the pci devices we want to reserve for our use */ in i5000_probe1()
1405 /* Time to get serious */ in i5000_probe1()
1408 mci->mc_idx = 0; in i5000_probe1()
1409 mci->mtype_cap = MEM_FLAG_FB_DDR2; in i5000_probe1()
1410 mci->edac_ctl_cap = EDAC_FLAG_NONE; in i5000_probe1()
1411 mci->edac_cap = EDAC_FLAG_NONE; in i5000_probe1()
1412 mci->mod_name = "i5000_edac.c"; in i5000_probe1()
1413 mci->mod_ver = I5000_REVISION; in i5000_probe1()
1414 mci->ctl_name = i5000_devs[dev_idx].ctl_name; in i5000_probe1()
1415 mci->dev_name = pci_name(pdev); in i5000_probe1()
1416 mci->ctl_page_to_phys = NULL; in i5000_probe1()
1418 /* Set the function pointer to an actual operation function */ in i5000_probe1()
1419 mci->edac_check = i5000_check_error; in i5000_probe1()
1424 debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n" in i5000_probe1()
1427 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */ in i5000_probe1()
1433 /* add this new MC control structure to EDAC's list of MCs */ in i5000_probe1()
1446 i5000_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR); in i5000_probe1()
1449 "%s(): Unable to create PCI control\n", in i5000_probe1()
1464 kobject_put(&mci->edac_mci_kobj); in i5000_probe1()
1466 return -ENODEV; in i5000_probe1()
1489 return i5000_probe1(pdev, id->driver_data); in i5000_init_one()
1505 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) in i5000_remove_one()
1508 /* retrieve references to resources, and free those resources */ in i5000_remove_one()
1510 kobject_put(&mci->edac_mci_kobj); in i5000_remove_one()
1541 * Try to initialize this module for its devices
1573 MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "